EMC6D103S-CZC-TR SMSC, EMC6D103S-CZC-TR Datasheet - Page 63

• Manufacturer Part Number: EMC6D103S-CZC-TR
• Description: Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
• Manufacturer: SMSC

Specifications of EMC6D103S-CZC-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.12
Register
Address
BIT
0
1
2
3
4
5
6
7
43h
Diode 1 Fault
Diode 2 Fault
Slow/Stalled
Slow/Stalled
Slow/Stalled
Slow/Stalled
+12v_Error
Reserved
Remote
Remote
TACH1
TACH2
TACH3
TACH4
NAME
Read/
Write
The remote diode fault bits do not clear on a read while the fault condition exists. If the start bit is set
when a fault condition occurs, 80h will be loaded into the associated temperature reading register,
which will cause the associated diode limit error bit to be set (Remote Diode 1 Limit Error or Remote
Diode 2 Limit Error) in addition to the diode fault bit. Disabling the enable bit for the diode will clear
both the fault bit and the error bit for that diode (see Note below).
This register is read only – a write to this register has no effect.
Note: Clearing the individual enable bits.
1. An interrupt status bit will never change from a 0 to a 1 when the corresponding individual interrupt
2. If the individual enable bit is cleared while the associated status bit is 1, the status bit will be
Register 43h: VID
The VID register contains the values of EMC6D103 VID0-VID4 input pins. This register indicates the
status of the VID lines that interconnect the processor to the Voltage Regulator Module (VRM).
R
enable bit is cleared (set to 0), regardless of whether the limits are violated during a measurement.
cleared when the associated reading register is updated. The reading registers only get updated
when the START bit is set to ‘1’. If the enable bit is cleared when the START bit is 0, the associated
interrupt status bit will not be cleared until the start bit is set to 1 and the associated reading register
is updated.
R/W
R
R
R
R
R
R
R
R
Register Name
DEFAULT
VID0-4
Table 8.18 Interrupt Status Register 2
0
0
0
0
0
0
0
0
Table 8.19 Register 43h: VID
The EMC6D103 automatically sets this bit to 1 when the 12V input
voltage is less than or equal to the limit set in the 12V Low Limit register
or greater than the limit set in the 12V High Limit register.
Reserved
The EMC6D103 automatically sets this bit to 1 when the TACH1 input
reading is above the value set in the Tach1 Minimum MSB and LSB
registers.
The EMC6D103 automatically sets this bit to 1 when the TACH2 input
reading is above the value set in the Tach2 Minimum MSB and LSB
registers.
The EMC6D103 automatically sets this bit to 1 when the TACH3 input
reading is above the value set in the Tach3 Minimum MSB and LSB
registers.
The EMC6D103 automatically sets this bit to 1 when the TACH4 input
reading is above the value set in the Tach4 Minimum MSB and LSB
registers.
The EMC6D103 automatically sets this bit to 1 when there is either a
short or open circuit fault on the Remote1+ or Remote1- thermal diode
input pins as defined in the section
Note:
The EMC6D103 automatically sets this bit to 1 when there is either a
short or open circuit fault on the Remote2+ or Remote2- thermal diode
input pins as defined in the section
Note:
DATASHEET
(MSb)
Bit 7
RES
If the START bit is set and a fault condition exists, the Remote
Diode 1 reading register will be forced to 80h.
If the START bit is set and a fault condition exists, the Remote
Diode 2 reading register will be forced to 80h.
63
Bit 6
RES
Bit 5
RES
DESCRIPTION
VID4
Bit 4
Diode Fault on page
Diode Fault on page
Bit 3
VID3
Bit 2
VID2
Bit 1
VID1
Revision 0.3 (03-01-07)
(LSb)
Bit 0
VID0
26.
26.
Default
Value
N/A