TMC2074-NU SMSC, TMC2074-NU Datasheet - Page 71

IC CTRL CIRC 128VTQFP PERIPH MOD

TMC2074-NU

Manufacturer Part Number
TMC2074-NU
Description
IC CTRL CIRC 128VTQFP PERIPH MOD
Manufacturer
SMSC
Series
CircLink™r
Datasheet

Specifications of TMC2074-NU

Controller Type
I/O Controller
Interface
Transceiver
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1024

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Dual Mode CircLink™ Controller
Datasheet
SMSC TMC2074
packet send at remote buffer mode (TXM = 1 and RTO = 1), this bit becomes 1 by the completion of the
one-packet send or written send-cancellation command (01h). This bit also becomes 0 after the first send
command and remains 0 until the TX cancel command is issued. Under this condition the node will
automatically continue to send. This bit becomes 1 when the mode exits from the consecutive automatic
send with the writing of the send cancellation command (01h) or RTO bit = 1.The same TA bit also exists
in bit 0 of the EC interrupt status register. This bit can also be set by a software reset.
- When writing: ARCNET mask register (cleared by software reset)
EXCNAK (bit 3)
This bit is set to 1 and the EXCNAK bit in the COMR1 (Diagnostic register) becomes 1 to generate the
interrupt.
(The COM bit in the EC interrupt mask register = 1)
RECON (bit 2)
This bit is set to 1 and the RECON bit in the status register (COMR0) becomes 1 to generate the interrupt.
(The COM bit in the EC interrupt mask register = 1)
NXTIDERR (bit 1)
This bit is set to 1 and the NXTIDERR bit in the diagnostic register (COMR1) becomes 1 to generate the
interrupt.
(The COM bit in the EC interrupt mask register = 1)
TA (bit 0)
This bit is set to 1 and the TA bit in the status register (COMR0) becomes 1 to generate the interrupt.
(The COM bit in the EC interrupt mask register = 1)
DATASHEET
Page 71
Revision 0.2 (10-23-08)

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