FDC37C665GT-MS SMSC, FDC37C665GT-MS Datasheet - Page 16

IC CTRLR SUPER I/O MULTI 100-QFP

FDC37C665GT-MS

Manufacturer Part Number
FDC37C665GT-MS
Description
IC CTRLR SUPER I/O MULTI 100-QFP
Manufacturer
SMSC
Datasheet

Specifications of FDC37C665GT-MS

Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
35mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1007

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37C665GT-MS
Manufacturer:
Microchip Technology
Quantity:
10 000
PIN NO.
24
25
26
27
nIDE High Byte
Enable
nHard Disk Chip
Select
nHard Disk Chip
Select
nI/O 16 Bit
Indicator
NAME
DESCRIPTION OF PIN FUNCTIONS
nIDEENHI
S1CF0
nHDCS0
IDEACF
nHDCS1
FACF
nIOCS16
nHDACK
SYMBOL
BUFFER
TYPE
O24
O24
O8
I
I
I
I
I
16
This signal is active low only in the AT
mode, and when IO16CSB is also active.
The I/O addresses for which this pin reacts
are 1F0H-1F7H in primary address mode or
170H-177H in secondary address mode.
This pin is not used in XT mode.
FDC37C666GT (Adapter Mode): Primary
Serial Configuration 0.
during reset active to define the address of
the Secondary Serial Port.
This
corresponding to addresses 1F0H-1F7H in
primary address mode or 170H-177H in
secondary address mode in the AT mode
and addresses 320H-323H in the XT mode.
FDC37C666GT
Address Control. Refer to FDC37C666GT
hardware
information.
reset active.
This
corresponding to 3F6H,3F7H for primary
address mode or 376H,377H for secondary
address mode in the AT mode and
addresses 3F6H,3F7H in the XT mode.
FDC37C666GT (Adapter Mode): Floppy
Disk
FDC37C666GT hardware configuration for
more information. Read and latched during
reset active.
This input indicates, in AT mode only, when
16 bit transfers are to take place.
signal is generated by the hard disk
interface. Logic "0" = 16 bit mode; logic "1"
= 8 bit mode.
In the XT mode, this is the Hard Disk
Controller DMA Acknowledge, low active.
is
is
Address
the
the
configuration
DESCRIPTION
Hard
Hard
Read and latched during
(Adapter
Control.
Disk
Disk
Read and latched
Mode):
Chip
Chip
for
Refer
select
select
more
This
IDE
to

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