TDA8023TT/C1,118 NXP Semiconductors, TDA8023TT/C1,118 Datasheet - Page 7

IC SMART CARD INTERFACE 28-TSSOP

TDA8023TT/C1,118

Manufacturer Part Number
TDA8023TT/C1,118
Description
IC SMART CARD INTERFACE 28-TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8023TT/C1,118

Package / Case
28-TSSOP
Controller Type
Smart Card Interface
Interface
I²C
Voltage - Supply
2.7 V ~ 6.5 V
Current - Supply
200mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935274975118
TDA8023TT-T
TDA8023TT-T
NXP Semiconductors
TDA8023_1
Product data sheet
8.2.2 With external divider on pin PORADJ
8.2.3 External capacitor on pin CDEL
If an external resistor bridge is connected to pin PORADJ (R1 to GND and R2 to V
shown in
hysteresis voltage are overridden by externally determined ones.
The voltage on pin PORADJ is:
where
The thresholds that are applied by the TDA8023 to this voltage V
where
The thresholds and hysteresis on V
The minimum threshold voltage V
Input PORADJ is biased internally with a pull-down current source of 4 A which is cut
when the voltage on this pin exceeds 1 V. This ensures that after detection of the external
bridge during power-on, the input current on this pin does not cause inaccuracy of the
bridge voltage.
The width of the POR pulse (t
typical value is 1 ms per 2 nF. Usually C
V
V
V
k
V
V
V
V
V
bg(int)
hys
PORADJ
th H PORADJ
th L PORADJ
th POR H
th POR L
hys POR
=
= 60 mV (typ)
------------------- -
R1
= 1.25 V (typ)
R1
Figure 1
+
=
R2
=
=
=
------------------- -
R1
V
---------- -
V
------------------------------------ -
V
------------------------------------- -
th L PORADJ
hys
k
th H PORADJ
R1
=
+
=
and
R2
V
V
bg int
k
bg int
k
Figure
Rev. 01 — 16 July 2007
V
DD
+
V
---------- -
W
V
---------- -
2), then the internal threshold voltages and the internal
=
=
2
hys
=
2
) is externally set by the value of the CDEL capacitor: the
hys
k
---------------------------------------- -
-----------------------------------------
th(POR)L
V
(falling)
V
(rising)
DD
bg int
V
bg int
DD
can then be calculated from:
CDEL
k
k
should be chosen higher than 2 V.
+
V
---------- -
V
---------- -
2
hys
= 22 nF, therefore t
2
hys
(falling)
(rising)
Low power IC card interface
W
PORADJ
= 10 ms (typ).
TDA8023
© NXP B.V. 2007. All rights reserved.
are:
DD
7 of 32
as

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