tda8023 NXP Semiconductors, tda8023 Datasheet

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tda8023

Manufacturer Part Number
tda8023
Description
Tda8023 Low Power Ic Card Interface
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
The TDA8023 is a complete cost-efficient, low-power analog interface for synchronous or
asynchronous smart cards. It can be placed between the card and the microcontroller with
very few external components to perform all supply, protection and control functions.
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TDA8023
Low power IC card interface
Rev. 01 — 16 July 2007
I
Supply voltage from 2.7 V to 6.5 V
Independant supply voltage V
Shutdown input for very low power consumption when the part is not used
Power reduction modes when the card is active
DC-to-DC converter for V
follower automatically selected according to supply voltage and card voltage)
1 specific protected half duplex bidirectional buffered I/O line, with current limitation at
2 auxiliary card I/O lines controlled by I
V
20 MHz, with controlled rise and fall times, filtered overload detection approximately
80 mA, current limitation about 120 mA
Thermal and short-circuit protections on all card contacts
Automatic activation and deactivation sequences: initiated by software or by hardware
in the event of a short-circuit, card take-off, overheating, V
Enhanced ElectroStatic Discharge (ESD) protection on card side (> 6 kV)
20 MHz clock input
Clock generation for the card up to 10 MHz (CLKIN divided by 1, 2, 4 or 5) with
synchronous frequency changes; stop HIGH or LOW or free running 1 MHz in cards
Low-power mode; current limitation on pin CLK (C3)
RST signal (C2) with current limitation at 20 mA, controlled by an embedded
programmable CLK pulse counter on asynchronous cards or by a register on
synchronous cards
ISO 7816-3, GSM 11.11 and EMV 2000 (payment systems) compatibility
Supply voltage supervisor for spike killing during power-on and emergency
deactivation at power-off: threshold internally fixed or set via an external resistor
bridge; pulse width internally fixed or set via an external capacitor
Card presence input with 10 ms built-in debouncing system
One interrupt signal INT
2
15 mA, maximum frequency 1 MHz
CC
C-bus controlled IC card interface in TSSOP28
regulation: 5 V, 3 V or 1.8 V
CC
generation (capacitive doubler, tripler, or inductive, or
DD(INTF)
8 %, I
for interface signals with the microcontroller
2
C-bus (C4 and C8)
CC
< 55 mA, current spikes of 40 nAs up to
DD
or V
Product data sheet
DD(DCDC)
drop-out

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tda8023 Summary of contents

Page 1

... Low power IC card interface Rev. 01 — 16 July 2007 1. General description The TDA8023 is a complete cost-efficient, low-power analog interface for synchronous or asynchronous smart cards. It can be placed between the card and the microcontroller with very few external components to perform all supply, protection and control functions. ...

Page 2

... Rev. 01 — 16 July 2007 Low power IC card interface Min Typ 2.7 - 2.7 - 1 [1] = 100 [3] 4. 1.8 V 1.65 1.8 [3] 4.65 - 2. TDA8023 Max Unit 6.5 V 6 200 200 150 5.25 V 3.15 V 1.95 V 5.35 V 3.24 V 1.98 V 350 © NXP B.V. 2007. All rights reserved ...

Page 3

... Low power IC card interface Min Typ 100 nF 100 nF V SBP SBM SAM SAP DDP DC-TO-DC CONVERTER TDA8023 SEQUENCER 14 CARD DRIVERS 13 CLOCK COUNTER © NXP B.V. 2007. All rights reserved. Max Unit 100 s 500 mW +85 C Version SOT361-1 ...

Page 4

... NXP Semiconductors optional external resistor bridge R2 R1 Fig 2. Block diagram with inductive DC-to-DC converter 7. Pinning information 7.1 Pinning Fig 3. Pin configuration TDA8023TT TDA8023_1 Product data sheet 100 PORADJ 20 CDEL 21 SUPPLY SUPERVISOR C CDEL GND 10 TDA8023 4 V DDI 3 SDWN 5 SDA ...

Page 5

... S positive supply for the DC-to-DC converter 27 C connection for the DC-to-DC converter 28 C connection for the DC-to-DC converter . DD(INTF Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface “Protection”) 2 C-bus master (open-drain) 2 C-bus master [2] [2] © NXP B.V. 2007. All rights reserved ...

Page 6

... pin V , that may be lower or higher than V DDI pin V DD(DCDC) DD (see Figure 4) is used internally for maintaining the TDA8023 less than V the TDA8023 will remain inactive whatever the levels DD th(POR)H . When V falls below V th(POR)H DD power on shutdown mode ...

Page 7

... If an external resistor bridge is connected to pin PORADJ (R1 to GND and shown in hysteresis voltage are overridden by externally determined ones. The voltage on pin PORADJ is: V PORADJ where k = ------------------- - R1 The thresholds that are applied by the TDA8023 to this voltage PORADJ PORADJ where V bg(int (typ) hys ...

Page 8

... When pin SDWN = HIGH, the TDA8023 is in Shutdown mode; the consumption in this mode is less than 10 A. The I If the card is extracted or inserted when the TDA8023 is in Power-down mode, pin INT becomes LOW and stays LOW as long as pin SDWN = HIGH. When pin SDWN is pulled LOW, the TDA8023 leaves Shutdown mode and executes a complete power-on reset sequence ...

Page 9

... STOP condition. 8.3.4 Device addressing Each TDA8023 has 2 different addresses, one for each of its two registers. Two TDA8023s may be used in parallel due to the address selection pin SAD0. Pin SAD0 is externally hardwired to pin V b2: HIGH sets bit b2 to logic 1, LOW resets b2 to logic 0. ...

Page 10

... CLKSW set when the TDA8023 is in Power-down mode and the clock has changed PRESL set when the card has been inserted or extracted; reset when the status ...

Page 11

... Synchronous or asynchronous cards management are defined when bit START is set: the TDA8023 will be in asynchronous cards management when bit RSTIN = 1 when bit START is set to logic 1. TDA8023_1 Product data sheet Command - Register 0 in Write mode bit description ...

Page 12

... An hysteresis of 100 mV is present on both thresholds: CC DD(DCDC and V > 5 DD(DCDC and V > DD(DCDC Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface the card, an integrated Figure © NXP B.V. 2007. All rights reserved ...

Page 13

... The V CC 168 nF. If the card socket is not very close to the TDA8023, one capacitor should be placed near the TDA8023, and a second one near the card contacts. 8.6 Sequencer and clock counter The sequencer takes care of ensuring activation and deactivation sequences according to ISO 7816 and EMV 2000, even in case of emergency (card removal during transaction, supply dropout or hardware problem) ...

Page 14

... VUP V CC I/O CLK RST act Rev. 01 — 16 July 2007 Low power IC card interface , see Figure act 7T and . t + ------ - ATR TDA8023 5 001aag340 © NXP B.V. 2007. All rights reserved ...

Page 15

... the time that V deact RST CLK I deact : limited Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface ). ). 14 and I/O become and ------ - ------ - needs for going down to less than 0.4 V, ...

Page 16

... NXP Semiconductors In case of overcurrent on pin V supply dropout, DC-to-DC out of limits, or overcurrent on pin RST, the TDA8023 performs an automatic emergency deactivation sequence on the card, resets bit START and pulls pin INT LOW. 9. Limiting values Table 13. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 17

... Rev. 01 — 16 July 2007 Low power IC card interface Min 2.7 2.7 1.5 [1] - [ MHz - - - - [1] = 100 see Figure 4 2. Min Typ 1.25 1.28 1.19 1. th(L)(PORADJ TDA8023 Typ Max Unit - 200 200 150 120 150 mV Max Unit 1. ...

Page 18

... V DD(DCDC) 5.5 5.8 3 3.5 Min Typ [ 4. 2. 1.8 V 1.65 1.8 [2] 4.65 - 2. 0.080 0.140 0.200 0.050 0.080 0.110 0.025 0.045 0.080 TDA8023 Max Unit 3 MHz 5 Max Unit 0 5.25 V 3.15 V 1.95 V 5.35 V 3.24 V 1.98 V 350 120 © ...

Page 19

... o(inact) at grounded pin I load I < < pin I/ pin I/ Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Min Typ Max 0 ...

Page 20

... MHz; GND = unless otherwise specified. amb Conditions load I < DD(INTF) Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Min Typ Max [ [3][4] - 500 650 - - 1 0.1 CC [3] ...

Page 21

... V DD(INTF) V > DD(INTF) 1.5 V < V < DD(INTF input or output depends on the pull-up resistance; input or output depends on the pull-up resistance Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Min Typ Max - - 0.1 [ ...

Page 22

... DD(INTF MHz; GND = unless otherwise specified. amb Conditions at die on pin I/O on pin I/O on pin CLK shutdown current; on pin RST shutdown current; on pin Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Min Typ Max 0 - 400 ...

Page 23

... P = STOP condition START condition. Fig 7. Timing requirements for the I TDA8023_1 Product data sheet HIGH HD;DAT SU;DAT 2 C-bus Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface t HD;STA SU;STA © NXP B.V. 2007. All rights reserved. P SU;STO mba705 ...

Page 24

... HOST CONTROLLER V INT DD GND SDA SCL CLKout I/OAUX V DD (1) Low-ESR capacitor, placed near the IC. (2) Low-ESR capacitor, placed near the C1 contact. Fig 8. Application diagram: typical TDA8023TT application with capacitive DC-to-DC converter TDA8023_1 Product data sheet IC1 V VUP DD 1 INT 2 C20 ...

Page 25

... CONTROLLER 4 INT DD GND SDA SCL CLKout 4.7 k I/OAUX V DD (1) Low-ESR capacitor, placed near the IC. (2) Low-ESR capacitor, placed near the C1 contact. Fig 9. Application diagram: typical TDA8023TT application with inductive DC-to-DC converter TDA8023_1 Product data sheet IC1 V VUP DD 1 INT 2 C20 ...

Page 26

... Rev. 01 — 16 July 2007 Low power IC card interface detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION TDA8023 SOT361 ( 0.8 8 0.1 o 0.5 0 ISSUE DATE 99-12-27 03-02-19 © NXP B.V. 2007. All rights reserved ...

Page 27

... Solder bath specifications, including temperature and impurities TDA8023_1 Product data sheet Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface © NXP B.V. 2007. All rights reserved ...

Page 28

... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 11. Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Figure 11) than a PbSn process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...

Page 29

... Product data sheet maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface peak temperature time 001aac844 © NXP B.V. 2007. All rights reserved ...

Page 30

... NXP Semiconductors 15. Revision history Table 24. Revision history Document ID Release date TDA8023_1 20070716 TDA8023_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Supersedes - © NXP B.V. 2007. All rights reserved ...

Page 31

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface © NXP B.V. 2007. All rights reserved ...

Page 32

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TDA8023 All rights reserved. Date of release: 16 July 2007 Document identifier: TDA8023_1 ...

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