FDC37B727-NS SMSC, FDC37B727-NS Datasheet - Page 138
FDC37B727-NS
Manufacturer Part Number
FDC37B727-NS
Description
IC CTRLR SUPER I/O ENH 128-QFP
Manufacturer
SMSC
Datasheet
1.FDC37B727-NS.pdf
(238 pages)
Specifications of FDC37B727-NS
Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1005
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The following registers can be accessed when in
configuration
Registers B0-B3, B8 and F4, and when not in
configuration they can be accessed through the
Index and Data Register. All soft power
management configuration registers are battery
backed up and are reset on Vbat POR.
Soft Power Enable Registers
Soft Power Enable Register 1
(Configuration Register B0, Logical Device 8)
This register contains the enable bits for the
wake-up function of the nPowerOn bit.
enabled, these bits allow their corresponding
function to turn on power to the system.
Soft Power Enable Register 2
(Configuration Register B1, Logical Device 8)
This register contains additional enable bits for
the wake-up function of the nPowerOn bit. When
enabled, these bits allow their corresponding
function to turn on power to the system. It also
contains
VTR_POR_OFF bits, as well as the OFF_EN bit,
which is defined as follows: After power up, this
bit defaults to 1, i.e., enabled. This bit allows the
software to enable or disable the button control
of power off.
Soft Power Status Registers
Soft Power Status Register 1
the
mode
at
VTR_POR_EN
Logical
Device
When
and
8,
138
(Configuration Register B2, Logical Device 8)
This register contains the status for the wake-up
events.
wakeup event occurs, whether or not it is
enabled as a wakeup function by setting the
corresponding bit in Soft Power Enable Register
1. However, only the enabled wakeup functions
will turn on power to the system.
Soft Power Status Register 2
(Configuration Register B3, Logical Device 8)
This register contains additional status for the
wake-up events. Note: The status bit gets set if
the wakeup event occurs, whether or not it is
enabled as a wakeup function by setting the
corresponding bit in Soft Power Enable Register
2. However, only the enabled wakeup functions
will turn on power to the system.
Soft Power Control Registers
WDT_CTRL
(Configuration Register F4, Logical Device 8)
This register is used for soft power management
and watchdog timer control. Bits [7:5] are for soft
power
Stop_Cnt.
Delay 2 Time Set Register
(Configuration Register B8, Logical Device 8)
This register is used to set Delay 2 to value from
500msec to 32sec. The default value is
500msec.
management:
Note: The status bit gets set if the
SPOFF,
Restart_Cnt,
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