FDC37B727-NS SMSC, FDC37B727-NS Datasheet - Page 77

• Manufacturer Part Number: FDC37B727-NS
• Description: IC CTRLR SUPER I/O ENH 128-QFP
• Manufacturer: SMSC

Specifications of FDC37B727-NS

• Controller Type: I/O Controller
• Interface: ISA Host
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 30mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1005

Note
Note
Effect Of The Reset on Register File
The Reset Function Table (Table 35) details the effect of the Reset input on each of the registers of the
Serial Port.
BAUD RATE
DESIRED
1
2
115200
230400
460800
: The percentage error for all baud rates, except where indicated otherwise, is 0.2%.
19200
38400
57600
: The High Speed bit is located in the Device Configuration Space.
134.5
1200
1800
2000
2400
3600
4800
7200
9600
110
150
300
600
50
Table 34 - Baud Rates Using 1.8462 MHz Clock for <= 38.4K; Using 1.8432MHz Clock
75
for 115.2k ; Using 3.6864MHz Clock for 230.4k; Using 7.3728 MHz Clock for 460.8k
GENERATE 16X CLOCK
DIVISOR USED TO
32770
32769
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
1
BETWEEN DESIRED AND ACTUAL
77
PERCENT ERROR DIFFERENCE
0.001
0.004
0.005
0.030
0.16
0.16
0.16
0.16
-
-
-
-
-
-
-
-
-
-
-
-
-
1
SPEED BIT
HIGH
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
2