RC82562EP Intel, RC82562EP Datasheet - Page 38
RC82562EP
Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Specifications of RC82562EP
Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361
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Host Software Interface
30
Table 9.
Note: The Load CU Base and the Load RU Base commands can only be executed when the CU and RU
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Device Addressing Formats
To support linear addressing, the device should be programmed as follows:
To support 32-bit segmented addressing, the device should be programmed as follows:
are in the idle state. Issuing these commands when the CU or RU is not idle is prohibited.
As mentioned earlier, the 8255x data structures have special memory alignment requirements. The
table below lists these requirements. Most of the structures listed in the table will be discussed in
much greater detail in subsequent sections.
Start of Command
Block List (CBL)
Start of Receive Frame
Area (RFA)
Next Command Block
(CB)
Start of TBD Array
Next Receive Frame
Descriptor (RFD)
TX Buffer
Dump Buffer (Dump
CB)
Port Dump / Self-Test
Dump Counters
•
•
•
•
•
•
Load a value of 00000000h into the CU base using the Load CU Base Address SCB command.
Load a value of 00000000h into the RU base using the Load RU Base Address SCB command.
Use the offset pointer values in the various data structures as absolute 32-bit linear addresses.
Load the desired segment value into the CU base using the Load CU Base Address SCB
command.
Load the desired segment value into the RU Base using the Load RU Base Address SCB
command.
Use the offset pointer values in the various data structures as 16-bit offsets. Software must
ensure that the upper 16 bits of this offset equal 0000h as the device will add all 32 bits of the
base and offset values.
Points to
CU Base (32-bit)
RU Base (32-bit)
CU Base (32-bit)
CU Base (32-bit)
RU Base (32-bit)
No Base Register
CU Base (32-bit)
No Base Register
No Base Register
Base Register
SCB General Pointer
SCB General Pointer
Link Address in CB
TBD Array Address in TxCB
Link Address in RFD
Transmit Buffer #n Address in
TBD Array
Buffer Address in CB
Port Address
SCB General Pointer
32-bit Offset Pointer
Base (32) + Offset (32)
Base (32) + Offset (32)
Base (32) + Offset (32)
Base (32) + Offset (32)
Base (32) + Offset (32)
Offset (32)
(Physical address)
Base (32) + Offset (32)
Offset (32)
(Physical address)
Offset (32)
(Physical address)
Physical Address
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