RC82562EP Intel, RC82562EP Datasheet - Page 54

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

Host Software Interface
6.3.4.2
46
Table 21. EEPROM Control Register Bits Definitions
Table 22. EEPROM Opcode Summary (64-register EEPROM)
Note: This algorithm will only work if the EEPROM drives a dummy zero to EEDO after receiving the
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Software Determination of EEPROM Size
To determine the size of the EEPROM, software may use the following steps.
complete address field.
18
17
16
Instruction
Read
Write
Erase
EWEN
EWDS
ERAL
WRAL
1. Activate the EEPROM by writing a 1 to the EECS bit.
2. Write the read opcode, including the start bit (110b), one bit at a time starting with the most
3. Write the address field, one bit at a time, keeping track of the number of bits shifted in, starting
significant bit (1):
with the most significant bit.
a. Write the opcode bit to the EEDI bit.
b. Write a 1 to EESK bit and wait the minimum SK high time.
c. Write a 0 to EESK bit and wait the minimum SK low time.
d. Repeat steps 2.a through 2.c for the next two opcode bits.
a. Write the address bit to the EEDI bit.
b. Write a 1 to the EESK bit and wait the minimum SK high time.
c. Write a 0 to the EESK bit and wait the minimum SK low time.
d. Read the EEDO bit, looking for the dummy 0 bit.
EEDI
EECS
EESK
Start
Bit
1
1
1
1
1
1
1
Serial Data In. The value of this bit is written to the EEPROM when performing
write operations.
Chip Select. Setting this bit to 1 enables the EEPROM. Setting the bit to 0 disables
the EEPROM. This bit must be set to 0 for a minimum of 1 µs between consecutive
instruction cycles.
Serial Clock. Setting this bit to 1 drives the serial clock line to the EEPROM high.
Setting this bit to 0 drives the serial clock line low. Toggling this bit high and then low
clocks data in or out of the EEPROM. The serial EEPROM specifies a minimum
clock period of 4 µs. The minimum period that the clock can be high or low is 1 µs. If
the clock is driven high for only 1 µs, then it must followed by a low period of 3 µs to
meet the minimum clock frequency specification.
Opcode
10
01
11
00
00
00
00
Address
A
A
A
11xxxx
00xxxx
10xxxx
01xxxx
5
5
5
A
A
A
4
4
4
A
A
A
3
3
3
A
A
A
2
2
2
A
A
A
1
1
1
A
A
A
0
0
0
Data
D1:D0
D15:D0
Comments
Read register A
Write register A
Erase register A
Erase/write enable
Erase/write disable
Erase all registers
Write all registers
5
5
5
A
A
A
4
4
4
A
A
A
3
3
3
A
A
A
2
2
2
A
A
A
1
1
1
A
A
A
0
0
0