RC82562EP Intel, RC82562EP Datasheet - Page 7

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

Contents
40 82557 Dual-Port FIFO Settings .................................................................................................. 65
41 82558 and 82559 Dual-Port FIFO Settings ................................................................................ 66
42 Extended Statistics Functionality ................................................................................................ 70
43 Pre-amble Length ....................................................................................................................... 73
44 82558 B-step Configuration Block ARP Frame IP Address........................................................ 74
45 82558 B-step ARP Frame IP Address Mapping .........................................................................75
46 Full Duplex Functionality............................................................................................................. 77
47 Dump Data Bytes (0-79) ............................................................................................................. 90
48 Dump Data Dwords (20-148)...................................................................................................... 93
49 RFD Status Bit Descriptions ....................................................................................................... 99
50 Actual Count in Header RFD .................................................................................................... 100
51 CU Control Commands: Actions at Acceptance Time .............................................................. 105
52 CU Activities Performed at the End of Execution .....................................................................105
53 RU Control Commands: Actions at Acceptance Time .............................................................. 106
54 Flow Control Frame Format......................................................................................................110
55 Flow Control Configuration Bits ................................................................................................ 113
56 MDI Register Set ...................................................................................................................... 116
57 82555 MDI Register Set ........................................................................................................... 116
58 24-bit OUI Identification Number .............................................................................................. 119
59 MDI Identification Registers 2 and 3: PHY ID Encoding........................................................... 119
60 LED Switch Control................................................................................................................... 128
61 Technology Ability Field Bit Assignments ................................................................................. 129
62 Technology Priority ................................................................................................................... 129
63 Fixed Wake-up Configuration Bits ............................................................................................ 141
64 82559 Port Commands .............................................................................................................148
65 Dump Data Structure ................................................................................................................ 149
66 IPCB Structure.......................................................................................................................... 153
67 IP Activation Bits (Byte 13) ....................................................................................................... 153
68 IP Activation Bits (Byte 12) ....................................................................................................... 153
69 IPCB Fields............................................................................................................................... 154
70 IPCB Structure Checksum Offload ........................................................................................... 156
71 IPCB Structure Large Send ......................................................................................................160
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
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