PIC18F4550-I/PT Microchip Technology Inc., PIC18F4550-I/PT Datasheet - Page 20

• Manufacturer Part Number: PIC18F4550-I/PT
• Description: 44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/PT

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2455/2550/4455/4550
TABLE 1-3:
DS39632C-page 18
RB0/AN12/INT0/
FLT0/SDI/SDA
RB1/AN10/INT1/SCK/
SCL
RB2/AN8/INT2/VMO
RB3/AN9/CCP2/VPO
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL compatible input
Note 1:
RB0
AN12
INT0
FLT0
SDI
SDA
RB1
AN10
INT1
SCK
SCL
RB2
AN8
INT2
VMO
RB3
AN9
CCP2
VPO
RB4
AN11
KBI0
CSSPP
RB5
KBI1
PGM
RB6
KBI2
PGC
RB7
KBI3
PGD
2:
3:
Pin Name
(1)
ST = Schmitt Trigger input with CMOS levels
O
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
Default assignment for CCP2 when CCP2MX Configuration bit is set.
These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
= Output
PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP QFN TQFP
33
34
35
36
37
38
39
40
Pin Number
10
12
14
15
16
17
11
9
10
11
14
15
16
17
8
9
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Preliminary
Analog
Analog
Analog
Analog
Analog
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
CMOS = CMOS compatible input or output
I
P
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
Digital I/O.
Analog input 12.
External interrupt 0.
Enhanced PWM Fault input (ECCP1 module).
SPI data in.
I
Digital I/O.
Analog input 10.
External interrupt 1.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
Digital I/O.
Analog input 8.
External interrupt 2.
External USB transceiver VMO output.
Digital I/O.
Analog input 9.
Capture 2 input/Compare 2 output/PWM 2 output.
External USB transceiver VPO output.
Digital I/O.
Analog input 11.
Interrupt-on-change pin.
SPP chip select control output.
Digital I/O.
Interrupt-on-change pin.
Low-Voltage ICSP™ Programming enable pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming clock pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
2
C™ data I/O.
= Input
= Power
Description
© 2006 Microchip Technology Inc.
2
C mode.