PIC18F4550-I/PT Microchip Technology Inc., PIC18F4550-I/PT Datasheet - Page 239

• Manufacturer Part Number: PIC18F4550-I/PT
• Description: 44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/PT

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

20.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of the
two serial I/O modules. (Generically, the USART is also
known as a Serial Communications Interface or SCI.)
The EUSART can be configured as a full-duplex
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a half-
duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break character transmit. These make it
ideally suited for use in Local Interconnect Network bus
(LIN bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full-duplex) with:
• Synchronous – Master (half-duplex) with
• Synchronous – Slave (half-duplex) with selectable
© 2006 Microchip Technology Inc.
- Auto-wake-up on Break signal
- Auto-baud calibration
- 12-bit Break character transmission
selectable clock polarity
clock polarity
ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
PIC18F2455/2550/4455/4550
Preliminary
The pins of the Enhanced USART are multiplexed
with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT/SDO as an EUSART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be set (= 1)
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register 20-1,
respectively.
Note:
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Register 20-2
and
DS39632C-page 237
Register 20-3,