PIC18F87K22-I/PTRSL Microchip Technology Inc., PIC18F87K22-I/PTRSL Datasheet - Page 131

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PIC18F87K22-I/PTRSL

Manufacturer Part Number
PIC18F87K22-I/PTRSL
Description
128kB Flash, 4kB RAM, 1kB EE, nanoWatt XLP, GP, 80 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F87K22-I/PTRSL

A/d Inputs
24-Channel, 12-Bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
69
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
128K Bytes
Ram Size
3.8K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
6-8-bit, 5-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
8.8
In alternate, power-managed Run modes, the external
bus continues to operate normally. If a clock source
with a lower speed is selected, bus operations will run
at that speed. In these cases, excessive access times
for the external memory may result if Wait states have
been enabled and added to external memory opera-
tions. If operations in a lower power Run mode are
anticipated, users should provide in their applications
for adjusting memory access times at the lower clock
speeds.
TABLE 8-3:
 2011 Microchip Technology Inc.
MEMCON
PADCFG1
PMD1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during external memory bus access.
Note 1:
Name
Operation in Power-Managed
Modes
(1)
Unimplemented in 64-pin devices (PIC18F6XK22), read as ‘0’.
PSPMD
EBDIS
RDPU
Bit 7
REGISTERS ASSOCIATED WITH THE EXTERNAL MEMORY BUS
CTMUMD
REPU
Bit 6
RTCCMD TMR4MD
RJPU
WAIT1
Bit 5
(1)
WAIT0
Bit 4
PIC18F87K22 FAMILY
In Sleep and Idle modes, the microcontroller core does
not need to access data; bus operations are
suspended. The state of the external bus is frozen, with
the address/data pins and most of the control pins hold-
ing at the same state they were in when the mode was
invoked. The only potential changes are to the CE, LB
and UB pins, which are held at logic high.
TMR3MD
Bit 3
RTSECSEL1 RTSECSEL0
TMR2MD
Bit 2
TMR1MD
WM1
Bit 1
DS39960C-page 131
EMBMD
WM0
Bit 0

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