PIC24FJ64GA002-I/SO Microchip Technology Inc., PIC24FJ64GA002-I/SO Datasheet - Page 27

no-image

PIC24FJ64GA002-I/SO

Manufacturer Part Number
PIC24FJ64GA002-I/SO
Description
MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ64GA002-I/SO

A/d Inputs
10 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Capacity
64 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
21
Number Of Pins
28
Package Type
28-pin SOIC
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Speed
32 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GA002-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 200
Part Number:
PIC24FJ64GA002-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC24FJ64GA002-I/SO
0
3.2
The PIC24F core has a separate, 16-bit wide data mem-
ory space, addressable as a single linear range. The
data space is accessed using two Address Generation
Units (AGUs), one each for read and write operations.
The data space memory map is shown in Figure 3-3.
All Effective Addresses (EAs) in the data memory space
are 16 bits wide and point to bytes within the data space.
This gives a data space address range of 64 Kbytes or
32K words. The lower half of the data memory space
(that is, when EA<15> = 0) is used for implemented
memory addresses, while the upper half (EA<15> = 1) is
reserved for the program space visibility area (see
Section 3.3.3 “Reading Data from Program Memory
Using Program Space Visibility”).
FIGURE 3-3:
© 2007 Microchip Technology Inc.
Note 1:
Data Address Space
Implemented
Data RAM
2:
Data memory areas are not shown to scale.
Upper memory limit for PIC24FJ16GAXXX devices is 17FFh.
DATA SPACE MEMORY MAP FOR PIC24FJ64GA004 FAMILY DEVICES
27FFh
Address
FFFFh
07FFh
1FFFh
7FFFh
0001h
0801h
2001h
2801h
8001h
MSB
(2)
MSB
Unimplemented
Program Space
Visibility Area
PIC24FJ64GA004 FAMILY
SFR Space
Read as ‘0’
Preliminary
Data RAM
LSB
PIC24FJ64GA family devices implement a total of
8 Kbytes of data memory. Should an EA point to a
location outside of this area, an all zero word or byte will
be returned.
3.2.1
The
byte-addressable, 16-bit wide blocks. Data is aligned
in data memory and registers as 16-bit words, but all
data space EAs resolve to bytes. The Least Significant
Bytes of each word have even addresses, while the
Most Significant Bytes have odd addresses.
data
DATA SPACE WIDTH
Address
0000h
07FEh
0800h
1FFEh
2000h
27FEh
2800h
7FFFh
8000h
FFFEh
LSB
memory
(2)
Space
SFR
space
Data Space
is
DS39881B-page 25
Near
organized
(1)
in

Related parts for PIC24FJ64GA002-I/SO