PIC24FJ64GA002-I/SO Microchip Technology Inc., PIC24FJ64GA002-I/SO Datasheet - Page 45

• Manufacturer Part Number: PIC24FJ64GA002-I/SO
• Description: MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA002-I/SO

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SOIC
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 4-1:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-0
Note 1:
R/SO-0
WR
U-0
—
2:
3:
(1)
These bits can only be reset on POR.
All other combinations of NVMOP3:NVMOP0 are unimplemented.
Available in ICSP™ mode only. Refer to device programming specification.
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
0 = Program or erase operation is complete and inactive
WREN: Write Enable bit
1 = Enable Flash program/erase operations
0 = Inhibit Flash program/erase operations
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set
0 = The program or erase operation completed normally
Unimplemented: Read as ‘0’
ERASE: Erase/Program Enable bit
1 = Perform the erase operation specified by NVMOP3:NVMOP0 on the next WR command
0 = Perform the program operation specified by NVMOP3:NVMOP0 on the next WR command
Unimplemented: Read as ‘0’
NVMOP3:NVMOP0: NVM Operation Select bits
1111 = Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)
0011 = Memory word program operation (ERASE = 0) or no operation (ERASE = 1)
0010 = Memory page erase operation (ERASE = 1) or no operation (ERASE = 0)
0001 = Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
R/W-0
R/W-0
ERASE
WREN
cleared by hardware once operation is complete.
automatically on any set attempt of the WR bit)
NVMCON: FLASH MEMORY CONTROL REGISTER
(1)
(1)
SO = Set-Only bit
W = Writable bit
‘1’ = Bit is set
R/W-0
WRERR
U-0
—
(1)
(1)
(1)
PIC24FJ64GA004 FAMILY
U-0
U-0
Preliminary
—
—
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
NVMOP3
R/W-0
U-0
(1,2)
—
(1)
(2)
NVMOP2
R/W-0
U-0
—
(1)
(2)
x = Bit is unknown
NVMOP1
R/W-0
U-0
—
(3)
(1)
(2)
DS39881B-page 43
NVMOP0
R/W-0
U-0
—
(1)
bit 8
bit 0
(2)