PIC24FJ64GA002-I/SO Microchip Technology Inc., PIC24FJ64GA002-I/SO Datasheet - Page 59

• Manufacturer Part Number: PIC24FJ64GA002-I/SO
• Description: MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA002-I/SO

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SOIC
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 6-1:
REGISTER 6-2:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 8
Note 1:
IPL2
R/W-0
U-0
U-0
U-0
—
—
—
2:
3:
2:
(2,3)
See Register 2-1 for the description of the remaining bit (s) that are not dedicated to interrupt control
functions.
The IPL bits are concatenated with the IPL3 bit (CORCON<3>) to form the CPU interrupt priority level.
The value in parentheses indicates the Interrupt Priority Level if IPL3 = 1.
The IPL Status bits are read-only when NSTDIS (INTCON1<15>) = 1.
See Register 2-2 for the description of remaining bit (s) that are not dedicated to interrupt control
functions.
The IPL3 bit is concatenated with the IPL2:IPL0 bits (SR<7:5>) to form the CPU interrupt priority level.
IPL2:IPL0: CPU Interrupt Priority Level Status bits
111 = CPU interrupt priority level is 7 (15). User interrupts disabled.
110 = CPU interrupt priority level is 6 (14)
101 = CPU interrupt priority level is 5 (13)
100 = CPU interrupt priority level is 4 (12)
011 = CPU interrupt priority level is 3 (11)
010 = CPU interrupt priority level is 2 (10)
001 = CPU interrupt priority level is 1 (9)
000 = CPU interrupt priority level is 0 (8)
IPL3: CPU Interrupt Priority Level Status bit
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
IPL1
R/W-0
U-0
U-0
U-0
—
—
—
SR: ALU STATUS REGISTER (IN CPU)
CORCON: CPU CONTROL REGISTER
(2,3)
W = Writable bit
‘1’ = Bit is set
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
IPL0
R/W-0
U-0
U-0
U-0
—
—
—
(2,3)
RA
PIC24FJ64GA004 FAMILY
U-0
R-0
U-0
U-0
Preliminary
—
—
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
IPL3
R/W-0
R/C-0
U-0
N
U-0
—
—
(1)
(2,3)
(2)
PSV
R/W-0
R/W-0
OV
U-0
U-0
—
—
(1)
(1)
x = Bit is unknown
x = Bit is unknown
R/W-0
U-0
Z
U-0
U-0
—
—
—
(1)
DS39881B-page 57
R/W-0
DC
R-0
C
U-0
U-0
—
—
(1)
(1)
bit 8
bit 0
bit 8
bit 0