PIC16F72-I/SP Microchip Technology Inc., PIC16F72-I/SP Datasheet - Page 23
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PIC16F72-I/SP
Manufacturer Part Number
PIC16F72-I/SP
Description
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F72-ISP.pdf
(136 pages)
Specifications of PIC16F72-I/SP
A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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3.0
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
Additional information on I/O ports may be found in the
PICmicro™ Mid-Range MCU Reference Manual,
(DS33023).
3.1
PORTA is a 6-bit wide, bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register, reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other RA port pins have TTL input levels and full
CMOS output drivers.
Other PORTA pins are multiplexed with analog inputs
and analog V
selected by clearing/setting the control bits in the
ADCON1 register (A/D Control Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 3-1:
2002 Microchip Technology Inc.
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
Note:
I/O PORTS
PORTA and the TRISA Register
On a Power-on Reset, these pins are con-
figured as analog inputs and read as ‘0’.
REF
PORTA
PORTA
ADCON1 ; Select Bank for ADCON1
0x06
ADCON1 ; as digital inputs
0xCF
TRISA
input. The operation of each pin is
INITIALIZING PORTA
; select bank for PORTA
; Initialize PORTA by
; clearing output
; data latches
; Configure all pins
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
; TRISA<7:6> are always
; read as ‘0’.
FIGURE 3-1:
FIGURE 3-2:
WR
TRIS
WR
Port
RD Port
To A/D Converter
Data
Bus
WR
TRIS
Data
Bus
WR
Port
RD Port
TMR0 Clock Input
TRIS Latch
D
Data Latch
D
CK
CK
Data Latch
TRIS Latch
D
D
CK
CK
RD TRIS
Q
Q
Q
Q
Q
Q
RD TRIS
Q
Q
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
BLOCK DIAGRAM OF
RA4/T0CKI PIN
Q
PIC16F72
Q
EN
Analog
Input
Mode
Schmitt
Trigger
Input
Buffer
EN
EN
V
D
V
N
V
P
N
D
DS39597B-page 21
SS
SS
DD
V
SS
V
V
DD
SS
TTL
Input
Buffer
I/O pin
I/O pin