PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 94

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PIC16F872-I/SP

Manufacturer Part Number
PIC16F872-I/SP
Description
28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F872-I/SP

A/d Inputs
5-Channel, 10-Bit
Cpu Speed
5 MIPS
Eeprom Memory
64 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F872
11.4
A Power-on Reset pulse is generated on-chip when
V
take advantage of the POR, tie the MCLR pin directly
(or through a resistor) to V
nal RC components usually needed to create a Power-
on Reset. A maximum rise time for V
See Electrical Specifications for details.
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the device
must be held in RESET until the operating conditions
are met. Brown-out Reset may be used to meet the
start-up conditions. For additional information, refer to
Application
Shooting” , (DS00007).
11.5
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only from the POR. The Power-
up Timer operates on an internal RC oscillator. The
chip is kept in RESET as long as the PWRT is active.
The PWRT’s time delay allows V
able level. A configuration bit is provided to enable/dis-
able the PWRT.
The power-up time delay will vary from chip to chip due
to V
parameters for details (T
11.6
The Oscillator Start-up Timer (OST) provides a delay of
1024 oscillator cycles (from OSC1 input) after the
PWRT delay is over (if PWRT is enabled). This helps to
ensure that the crystal oscillator or resonator has
started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
TABLE 11-3:
DS30221C-page 92
DD
Oscillator Configuration
DD
rise is detected (in the range of 1.2V - 1.7V). To
, temperature and process variation. See DC
Power-on Reset (POR)
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
XT, HS, LP
RC
Note
TIME-OUT IN VARIOUS SITUATIONS
(AN007),
PWRT
DD
. This will eliminate exter-
, parameter #33).
72 ms + 1024T
DD
“Power-up
PWRTE = 0
to rise to an accept-
72 ms
DD
is specified.
Power-up
OSC
Trouble
PWRTE = 1
1024T
OSC
11.7
The configuration bit, BODEN, can enable or disable
the Brown-out Reset circuit. If V
(parameter #D005, about 4V) for longer than T
(parameter #35, about 100 S), the brown-out situation
will reset the device. If V
than T
Once the brown-out occurs, the device will remain in
Brown-out Reset until V
Power-up Timer then keeps the device in RESET for
T
below V
cess will restart when V
Power-up Timer Reset. The Power-up Timer is always
enabled when the Brown-out Reset circuit is enabled,
regardless of the state of the PWRT configuration bit.
11.8
On power-up, the time-out sequence is as follows: the
PWRT delay starts (if enabled) when a POR Reset
occurs. Then, OST starts counting 1024 oscillator
cycles when PWRT ends (LP, XT, HS). When the OST
ends, the device comes out of RESET.
If MCLR is kept low long enough, the time-outs will
expire. Bringing MCLR high will begin execution imme-
diately. This is useful for testing purposes or to synchro-
nize more than one PIC16F872 device operating in
parallel.
Table 11-5 shows the RESET conditions for the
STATUS, PCON and PC registers, while Table 11-6
shows the RESET conditions for all the registers.
11.9
The Power Control/Status Register, PCON, has two bits.
Bit 0 is the Brown-out Reset Status bit (BOR). Bit BOR
is unknown on a Power-on Reset. It must then be set
by the user and checked on subsequent RESETS to
see if bit BOR cleared, indicating a BOR occurred.
When the Brown-out Reset is disabled, the state of the
BOR bit is unpredictable and is, therefore, not valid at
any time.
Bit 1 is the Power-on Reset Status bit (POR). It is
cleared on a Power-on Reset and unaffected other-
wise. The user must set this bit following a Power-on
Reset.
PWRT
BOR
(parameter #33, about 72 mS). If V
BOR
Brown-out Reset (BOR)
Time-out Sequence
Power Control/Status Register
(PCON)
72 ms + 1024T
, a RESET may not occur.
during T
Brown-out
72 ms
PWRT
© 2006 Microchip Technology Inc.
DD
OSC
DD
DD
, the Brown-out Reset pro-
rises above V
falls below V
rises above V
DD
Wake-up from
falls below V
1024T
SLEEP
DD
BOR
BOR
should fall
OSC
BOR
with the
for less
. The
BOR
BOR

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