PIC18F1220-I/SO Microchip Technology Inc., PIC18F1220-I/SO Datasheet - Page 191

no-image

PIC18F1220-I/SO

Manufacturer Part Number
PIC18F1220-I/SO
Description
Microcontroller; 4 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-SOIC
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F1220-I/SO

A/d Inputs
7-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
4K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
19.9
The LVP bit in configuration register, CONFIG4L,
enables Low-Voltage Programming (LVP). When LVP
is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
dedicated to controlling Program mode entry and is not
available as a general purpose I/O pin.
LVP is enabled in erased devices.
While programming using LVP, V
MCLR/V
enter Programming mode, V
pin.
 2004 Microchip Technology Inc.
Note 1: High-voltage programming is always
PP
PP
2: When
3: When LVP is enabled, externally pull the
Low-Voltage ICSP Programming
/RA5 pin, but the RB5/PGM/KBI1 pin is then
/RA5 pin as in normal execution mode. To
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
Low-Voltage
SS
DD
to allow normal program
is applied to the PGM
DD
Programming
is applied to the
IHH
is
If Low-Voltage Programming mode will not be used, the
LVP bit can be cleared and RB5/PGM/KBI1 becomes
available as the digital I/O pin RB5. The LVP bit may be
set or cleared only when using standard high-voltage
programming (V
Once LVP has been disabled, only the standard high-
voltage programming is available and must be used to
program the device.
Memory that is not code-protected can be erased,
using either a Block Erase, or erased row by row, then
written at any specified V
is to be erased, a Block Erase is required. If a Block
Erase is to be performed when using Low-Voltage
Programming, the device must be supplied with V
4.5V to 5.5V.
PIC18F1220/1320
IHH
applied to the MCLR/V
DD
. If code-protected memory
DS39605C-page 189
PP
/RA5 pin).
DD
of

Related parts for PIC18F1220-I/SO