IDT82V2084PF IDT, Integrated Device Technology Inc, IDT82V2084PF Datasheet - Page 30

• Manufacturer Part Number: IDT82V2084PF
• Description: IC LIU T1/J1/E1 4CH 128-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Line Interface Units (LIUs)r

Specifications of IDT82V2084PF

• Protocol: E1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82V2084PF

QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
received errors when the CNT_MD bit (MAINT6, 10H...) is set to ‘0’. When
there is a ‘0’ to ‘1’ transition on the CNT_TRF bit (MAINT6, 10H...), the data
in the counter will be transferred to (CNT0, 18H...) and (CNT1, 19H...), then
the counter will be reset. The errors occurred during the transfer will be
accumulated to the next round. If the counter overflows, a counter overflow
interrupt indicated by CNT_OV_IS bit (INTS1, 17H...) will be generated if
it is not masked by CNT_IM bit (INTM1, 12H...).
Note: 1. It is recommended that users should do the followings within next round
• Manual Report Mode
In Manual Report Mode, the internal Error Counter starts to count the
of error counting: Read the data in CNT0 and CNT1; Reset CNT_TRF
bit for the next ‘0’ to ‘1’ transition on this bit.
Figure-18 Manual Report Mode
N
CNT0, CNT1
counter
counter
CNT1 within next round
Reset CNT_TRF for the
Read the data in CNT0,
Manual Report mode
next '0' to '1' transition
A '0' to '1' transition
on CNT_TRF?
(CNT_MD=0)
counting
0
Y
data in
1
same process
next round
repeat the
30
3.8.3
stream, will a ‘0’ to ‘1’ transition on the BPV_INS bit (MAINT6, 10H...) gen-
erate a bipolar violation pulse, and the polarity of the second ‘1’ in the series
will be inverted.
a logic error during the PRBS/QRSS transmission.
3.9
DFM_OFF bit (TCF1, 03H...). If the transmit driver failure monitor is
enabled, the transmit driver failure will be captured by DF_S bit (STAT0,
14H...). The transition of the DF_S bit is reflected by DF_IS bit (INTS0,
16H...), and, if enabled by DF_IM bit (INTM0, 11H...), will generate an inter-
rupt. When there is a short circuit on the TTIPn/TRINGn port, the output cur-
rent will be limited to 100 mA (typical) and an interrupt will be generated.
Only when three consecutive ‘1’s are detected in the transmit data
A ‘0’ to ‘1’ transition on the EER_INS bit (MAINT6, 10H...) will generate
The transmit driver failure monitor can be enabled or disabled by setting
BIPOLAR VIOLATION AND PRBS ERROR INSERTION
LINE DRIVER FAILURE MONITORING
TEMPERATURE RANGES
INDUSTRIAL