PEB3086FV14XT Lantiq, PEB3086FV14XT Datasheet - Page 174

• Manufacturer Part Number: PEB3086FV14XT
• Manufacturer: Lantiq

Specifications of PEB3086FV14XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

TEI1
TEI2
RBC8-11 ... Receive Byte Count
Four most significant bits of the total number of bytes in a received message (see
RBCLD register).
Note: Normally RBCHD and RBCLD should be read by the microcontroller after an
4.1.14
Value after reset: FF
TEI1 ... Terminal Endpoint Identifier
In all message transfer modes except in transparent modes 0, 1 and extended
transparent mode, TEI1 is used by the ISAC-SX for address recognition. In the case of
a two-byte address field, it contains the value of the first programmable Terminal
Endpoint Identifier according to the ISDN LAPD-protocol.
In non-automodes with one-byte address field, TEI1 is a command address, according
to X.25 LAPB.
EA1 ... Address field Extension bit
This bit is set to ’1’ according to HDLC/LAPD.
4.1.15
Value after reset: FF
TEI2 ... Terminal Endpoint Identifier
In all message transfer modes except in transparent modes 0, 1 and extended
transparent mode, TEI2 is used by the ISAC-SX for address recognition. In the case of
Data Sheet
RME-interrupt in order to determine the number of bytes to be read from the
RFIFOD, and the total message length. The contents of the registers are valid only
after an RME or RPF interrupt, and remain so until the frame is acknowledged via
the RMC bit or RRES.
7
7
TEI1 - TEI1 Register 1
TEI2 - TEI2 Register
H
H
TEI1
TEI2
174
Detailed Register Description
0
0
EA1
EA2
PEB 3086
2003-01-30
ISAC-SX
WR (27)
WR (28)