PEB3086FV14XT Lantiq, PEB3086FV14XT Datasheet - Page 178

• Manufacturer Part Number: PEB3086FV14XT
• Manufacturer: Lantiq

Specifications of PEB3086FV14XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

CIX0
S/G ... Stop/Go Bit Monitoring
Indicates the availability of the upstream D-channel on the S/T interface.
1: Stop
0: Go
BAS ... Bus Access Status
Indicates the state of the TIC-bus:
0: the ISAC-SX itself occupies the D- and C/I-channel
1: another device occupies the D- and C/I-channel
Note: The CODR0 bits are updated every time a new C/I-code is detected in two
4.1.19
Value after reset: FE
CODX0 ... C/I-Code 0 Transmit
Code to be transmitted in the C/I-channel 0.
The code is only transmitted if the TIC bus is occupied. If TIC bus is enabled but
occupied by another device, only “1s” are transmitted.
TBA2-0 ... TIC Bus Address
Defines the individual address for the ISAC-SX on the IOM bus.
This address is used to access the C/I- and D-channel on the IOM interface.
Note: If only one device is liable to transmit in the C/I- and D-channels of the IOM it
BAC ... Bus Access Control
Only valid if the TIC-bus feature is enabled (MODED.DIM2-0).
If this bit is set, the ISAC-SX will try to access the TIC-bus to occupy the C/I-channel
even if no D-channel frame has to be transmitted. It should be reset when the access
has been completed to grant a similar access to other devices transmitting in that IOM-
channel.
Data Sheet
consecutive IOM-frames. If several consecutive valid new codes are detected and
CIR0 is not read, only the first and the last C/I code is made available in CIR0 at
the first and second read of that register, respectively.
should always be given the address value ’7’.
7
CIX0 - Command/Indication Transmit 0
H
CODX0
178
TBA2 TBA1 TBA0
Detailed Register Description
0
BAC
PEB 3086
2003-01-30
ISAC-SX
WR (2E)