PIC18F6585-I/PT Microchip Technology Inc., PIC18F6585-I/PT Datasheet - Page 376

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PIC18F6585-I/PT

Manufacturer Part Number
PIC18F6585-I/PT
Description
64 PIN, 48 KB FLASH, 3328 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F6585-I/PT

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
53
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
48K Bytes
Ram Size
3.3K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F6585-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F6585-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F6585/8585/6680/8680
BCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS30491C-page 374
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FLAG_REG = 0xC7
FLAG_REG = 0x47
Q1
register ‘f’
Bit Clear f
[ label ] BCF
0
0
a
0
None
Bit ‘b’ in register ‘f’ is cleared. If ‘a’
is ‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
BCF
Read
1001
Q2
f
b
[0,1]
f<b>
255
7
FLAG_REG,
bbba
Process
Data
Q3
f,b[,a]
ffff
7, 0
register ‘f’
Write
Q4
ffff
BN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Negative =
If Negative =
No
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Negative
[ label ] BN
-128
if negative bit is ‘1’
(PC) + 2 + 2n
None
If the Negative bit is ‘1’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
=
=
=
1110
No
Q2
Q2
‘n’
‘n’
address (HERE)
1;
address (Jump)
0;
address (HERE+2)
 2004 Microchip Technology Inc.
n
127
0110
operation
BN
Process
Process
Data
Data
n
No
Q3
Q3
PC
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn

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