P89LPC936FDH-T NXP Semiconductors, P89LPC936FDH-T Datasheet - Page 51

• Manufacturer Part Number: P89LPC936FDH-T
• Description: MCU 8-Bit 89LP 80C51 CISC 16KB Flash 2.5V/3.3V 28-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of P89LPC936FDH-T

• Package: 28TSSOP
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Ram Size: 768 Byte
• Program Memory Size: 16 KB
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx8-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 2

NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
8.28.8 ISP
8.28.9 Power-on reset code execution
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the P89LPC933/934/935/936 User manual.
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC933/934/935/936 through the serial port.
This firmware is provided by Philips and embedded within each P89LPC933/934/935/936
device. The Philips ISP facility has made ISP in an embedded application possible with a
minimum of additional expense in components and circuit board area. The ISP function
uses five pins (V
available to interface your application to an external circuit in order to use this feature.
The P89LPC933/934/935/936 contains two special flash elements: the boot vector and
the boot status bit. Following reset, the P89LPC933/934/935/936 examines the contents
of the boot status bit. If the boot status bit is set to zero, power-up execution starts at
location 0000H, which is the normal start address of the user’s application code. When
the boot status bit is set to a value other than zero, the contents of the boot vector are
used as the high byte of the execution address and the low byte is set to 00H.
Table 9
Remark: These settings are different than the original P89LPC932. Tools designed to
support the P89LPC933/934/935/936 should be used to program this device, such as
Flash Magic version 1.98, or later.
A factory-provided boot loader is preprogrammed into the address space indicated and
uses the indicated boot loader entry point to perform ISP functions. This code can be
erased by the user.
Remark: Users who wish to use this loader should take precautions to avoid erasing the
sector that contains this boot loader. Instead, the page erase function can be used to
erase the pages located in this sector which are not used by the boot loader.
A custom boot loader can be written with the boot vector set to the custom boot loader, if
desired.
Table 9.
Device
P89LPC933
P89LPC934
P89LPC935
P89LPC936
shows the factory default boot vector settings for these devices.
Default boot vector values and ISP entry points
All information provided in this document is subject to legal disclaimers.
DD
Default
boot vector
0FH
1FH
1FH
3FH
, V
SS
Rev. 8 — 12 January 2011
, TXD, RXD, and RST). Only a small connector needs to be
8-bit microcontroller with accelerated two-clock 80C51 core
Default
boot loader
entry point
0F00H
1F00H
1F00H
3F00H
P89LPC933/934/935/936
Default boot loader
code range
0E00H to 0FFFH
1E00H to 1FFFH
1E00H to 1FFFH
3E00H to 3FFFH
© NXP B.V. 2011. All rights reserved.
Boot sector
range
0C00H to 0FFFH
1C00H to 1FFFH
1C00H to 1FFFH
3C00H to 3FFFH
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