WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 44

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
5.9.2
5.9.3
5.9.4
Cortina Systems
Monitoring Next Page Exchange
The LXT972M PHY offers an Alternate Next Page mode to simplify the next page
exchange process. Normally, register bit 6.1 (Page Received) remains set until read.
When Alternate Next Page mode is enabled, register bit 6.1 is automatically cleared
whenever a new negotiation process takes place. This action prevents the user from
reading an old value in bit 6.1 and assuming that Registers 5 and 8 (Partner Ability)
contain valid information. Additionally, the LXT972M PHY uses register bit 6.5 to indicate
when the current received page is the base page. This information is useful for
recognizing when next pages must be resent due to a new negotiation process starting.
register bits 6.1 and 6.5 are cleared when read.
LED Functions
The LXT972M PHY has these direct LED driver pins: LED1/CFG1, LED2/CFG2, and
LED3/CFG3.
On power-up, all the drivers are asserted for approximately 1 second after reset de-
asserts. Each LED driver can be programmed using the LED Configuration Register
(Table 54, LED Configuration Register - Address 20, Hex 14, on page
of the following conditions:
The LED drivers can also be programmed to display various combined status conditions.
For example, setting register bits 20.15:12 to ‘1101’ produces the following combination of
Link and Activity indications:
The LXT972M PHY LED driver pins also provide initial configuration settings. The LED
pins are sensitive to polarity and automatically pull up or pull down to configure for either
open drain or open collector circuits (10 mA Max current rating) as required by the
hardware configuration. For details, see the discussion of
Configuration Settings, on page
LED Pulse Stretching
The LED Configuration Register also provides optional LED pulse stretching to 30, 60, or
100 ms. The pulse stretch time is extended further if the event occurs again during this
pulse stretch period.
®
• Collision Condition
• Duplex Mode
• Link Status
• Operating Speed
• Receive Activity
• Transmit Activity
• If Link is down, LED is off. If activity is detected from the MAC, the LED still blinks
• If Link is up, LED is on.
• If Link is up and activity is detected, the LED blinks at the stretch interval selected by
LXT972M Single-Port 10/100 Mbps PHY Transceiver
even if the link is down.
register bits 20.3:2 and continues to blink as long as activity is present.
28.
Section 5.4.4, Hardware
5.9 Monitoring Operations
77) to indicate one
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