WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 63

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
Table 38
Cortina Systems
RESET_L Pulse Width and Recovery Timing
®
RESET_L pulse width
RESET_L recovery
1. Typical values are at 25° C and are for design aid only, not guaranteed, and not subject to production
2. Reset Recovery Delay is specified as a maximum value because it refers to the PHY guaranteed
LXT972M Single-Port 10/100 Mbps PHY Transceiver
testing.
performance. The PHY comes out of reset after a delay of no more than 300 μ s. System designers should
consider this value as a minimum value. After de-asserting RESET_L, the MAC should delay no less than
300 μ s before accessing the MDIO port.
Parameter
delay2
Symbol
t1
t2
Min
10
–
Typ
–
1
Max
300
–
Units
7.2 AC Timing Diagrams and
ns
μ s
Test Conditions
–
–
Parameters
Page 63