AD1896AYRSZ Analog Devices Inc, AD1896AYRSZ Datasheet - Page 18

• Manufacturer Part Number: AD1896AYRSZ
• Description: IC CONV SAMPLE RATE ASYNC 28SSOP
• Manufacturer: Analog Devices Inc
• Type: Sample Rate Converterr

Specifications of AD1896AYRSZ

• Applications: Automotive Audio, processing, receivers
• Voltage - Supply, Digital: 3.13 V ~ 3.46 V
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Audio Control Type: Sample Rate Converter
• Output Power: 132mW
• Supply Voltage Range: 3.135V To 3.465V, 3.135V To 5.5V
• Operating Temperature Range: -40°C To +105°C
• Audio Ic Case Style: SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD1896
ASRC FUNCTIONAL OVERVIEW
THEORY OF OPERATION
Asynchronous sample rate conversion is converting data from
one clock source at some sample rate to another clock source at
the same or a different sample rate. The simplest approach to an
asynchronous sample rate conversion is the use of a zero-order
hold between the two samplers shown in Figure 4. In an asyn-
chronous system, T2 is never equal to T1 nor is the ratio between
T2 and T1 rational. As a result, samples at f
or dropped producing an error in the resampling process. The
frequency domain shows the wide side lobes that result from
this error when the sampling of f
attenuated images from the sin(x)/x nature of the zero-order
hold. The images at f
hold are infinitely attenuated. Since the ratio of T2 to T1 is an
irrational number, the error resulting from the resampling at
f
nificantly reduced through interpolation of the input data at
f
THE CONCEPTUAL HIGH INTERPOLATION MODEL
Interpolation of the input data by a factor of 2
(2
both the time domain and the frequency domain of interpolation
by a factor of 2
involve the steps of zero-stuffing (2
S_OUT
S_IN
20
. The AD1896 is conceptually interpolated by a factor of 2
– 1) samples between each f
FREQUENCY RESPONSE OF f
HOLD SPECTRUM
Figure 4. Zero-Order Hold Being Used by f
Resample Data from f
can never be eliminated. However, the error can be sig-
IN
f
S_IN
= 1/T1
20
SPECTRUM OF ZERO-ORDER HOLD OUTPUT
. Conceptually, interpolation by 2
SPECTRUM OF f
SIN(X)/X OF ZERO-ORDER HOLD
S_IN
, dc signal images, of the zero-order
ORIGINAL SIGNAL
SAMPLED AT f
ZERO-ORDER
f
S_OUT
S_OUT
S_IN
HOLD
CONVOLVED WITH ZERO-ORDER
S_OUT
S_OUT
S_IN
20
S_IN
SAMPLING
sample. Figure 5 shows
– 1) number of samples
is convolved with the
f
S_OUT
S_OUT
20
= 1/T2
involves placing
will be repeated
OUT
S_OUT
2
20
f
S_OUT
would
to
20
.
–18–
between each f
signal with a digital low-pass filter to suppress the images. In the
time domain, it can be seen that f
sample from the zero-order hold as opposed to the nearest f
sample in the case of no interpolation. This significantly reduces
the resampling error.
In the frequency domain shown in Figure 6, the interpolation
expands the frequency axis of the zero-order hold. The images
from the interpolation can be sufficiently attenuated by a good
low-pass filter. The images from the zero-order hold are now
pushed by a factor of 2
of the zero-order hold, which is f
zero-order hold are the determining factor for the fidelity of the
output at f
the zero-order hold frequency response, maximum image =
sin (p ¥ F/f
worst-case image that would be 2
f
The following worst-case images would appear for f
192 kHz:
S_INTERP
IN
Image at f
Image at f
f
S_IN
Figure 5. Time Domain of the Interpolation and
Resampling
is f
S_INTERP
S_OUT
S_IN
S_INTERP
S_INTERP
INTERPOLATE
TIME DOMAIN OF f
TIME DOMAIN OUTPUT OF THE LOW-PASS FILTER
TIME DOMAIN OF f
TIME DOMAIN OF THE ZERO-ORDER HOLD OUTPUT
S_IN
BY N
. The worst-case images can be computed from
¥ 2
)/(p ¥ F/f
sample and convolving this interpolated
20
– 96 kHz = –125.1 dB
+ 96 kHz = –125.1 dB
.
20
closer to the infinite attenuation point
S_INTERP
S_IN
S_OUT
LOW-PASS
FILTER
SAMPLES
S_OUT
RESAMPLING
S_IN
20
). F is the frequency of the
¥ f
¥ 2
selects the closest f
S_IN
20
. The images at the
ZERO-ORDER
± f
HOLD
S_IN
/2 , and
S_IN
S_IN
REV. A
f
S_OUT
=
S_IN
¥ 2
OUT
20