ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 99

• Manufacturer Part Number: ADV7181BCP
• Description: IC VIDEO DECODER NTSC 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7181BCP

• Applications: Recorders, Set-Top Boxes
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Adc/dac Resolution: 9b
• Screening Level: Industrial
• Package Type: LFCSP EP
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant

RECOMMENDED ANTI-ALIAS FILTER
CIRCUIT IS SHOWN IN FIGURE 40 ON THE
PREVIOUS PAGE. THIS CIRCUIT INCLUDES
A 75Ω TERMINATION RESISTOR, INPUT
BUFFER AND ANTI-ALIASING FILTER.
CBVS
S-VIDEO
Pb
Pr
Y
FILTER CIRCUIT
FILTER CIRCUIT
FILTER CIRCUIT
FILTER CIRCUIT
FILTER CIRCUIT
FILTER CIRCUIT
SELECT I
ADDRESS
ANTI-ALIAS
ANTI-ALIAS
ANTI-ALIAS
ANTI-ALIAS
ANTI-ALIAS
ANTI-ALIAS
MPU INTERFACE
CONTROL LINES
+
AGND
AGND DGND
2
DVDDIO
C
10µF
DVSS
AGND
0.1µF
0.1µF
0.1µF
DVDDIO
DVDDIO
+
+
10µF
RESET
DVDDIO
PVDD
DVDD
(3.3V)
(1.8V)
AVDD
(3.3V)
(1.8V)
10µF
10µF
2kΩ
DGND
AGND
AGND
+
DVDDIO
33pF
100nF
4.7kΩ
0.1µF
0.1µF
DVDDIO
2kΩ
0.1µF
DGND
33µF
33µF
33µF
33µF
DGND
AGND
AGND
DGND
27MHz
DGND
Figure 42. Typical Connection Diagram
FERITE BEAD
FERITE BEAD
FERITE BEAD
FERITE BEAD
100nF
100nF
100nF
100nF
100nF
100nF
33Ω
33Ω
0.1nF
0.1nF
33pF
Rev. B | Page 99 of 104
AIN2
AIN1
AIN3
AIN4
AIN5
AIN6
CAP Y1
CAP Y2
CAP C2
CML
REFOUT
XTAL
XTAL1
PWRDN
ALSB
SCLK
SDA
RESET
10µF
10µF
10µF
10µF
DGND
AGND
AGND
DGND
ADV7181
AGND
AGND
DGND
DGND
FIELD
ELPF
LLC
SFL
P10
P12
P13
P14
P15
0.1µF
0.1µF
0.1µF
0.1µF
P11
HS
DGND
AGND
AGND
DGND
VS
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
1.69kΩ
82nF
0.01µF
0.01µF
0.01µF
0.01µF
DGND
AGND
AGND
DGND
PVDD
MULTI
FORMAT
PIXEL
PORT
P15–P8 8-BIT ITU-R BT.656 PIXEL DATA @ 27MHz
P7–P0 Cb AND Cr 16-BIT ITU-R BT.656 PIXEL DATA @ 13.5MHz
P15–P8 Y1 AND Y2 16-BIT ITU-R BT.656 PIXEL DATA @ 13.5MHz
27MHz OUTPUT CLOCK
SFL O/P
HS O/P
VS O/P
FIELD O/P
POWER SUPPLY
DECOUPLING FOR
EACH POWER PIN
POWER SUPPLY
DECOUPLING FOR
EACH POWER PIN
POWER SUPPLY
DECOUPLING FOR
EACH POWER PIN
POWER SUPPLY
DECOUPLING FOR
EACH POWER PIN
10nF
ADV7181