DS92LV16TVHG/NOPB National Semiconductor, DS92LV16TVHG/NOPB Datasheet - Page 4

• Manufacturer Part Number: DS92LV16TVHG/NOPB
• Description: IC SERDES LVDS 16BIT BUS 80-LQFP
• Manufacturer: National Semiconductor

Specifications of DS92LV16TVHG/NOPB

• Function: Serializer/Deserializer
• Data Rate: 2.56Gbps
• Input Type: LVTTL/LVCMOS
• Output Type: LVTTL, LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 16
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• No. Of Inputs: 16
• No. Of Outputs: 16
• Supply Voltage Range: 3.15V To 3.45V
• Driver Case Style: QFP
• No. Of Pins: 80
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 1280Mbps
• For Use With: BLVDS16EVK - BOARD EVAL FOR DS92LV16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DS92LV16TVHG; *DS92LV16TVHG/NOPB; DS92LV16TVHG

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Symbol
Symbol
Symbol
t
t
t
t
t
t
t
t
Serializer Switching Characteristics
t
t
Over recommended operating supply and temperature ranges unless otherwise specified.
Deserializer Timing Requirements for REFCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
t
Deserializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
RCP
RDC
ROS
ROH
t
CLH
CHL
HZR
LZR
ZHR
ZLR
t
t
RFCP
DD
t
t
t
t
t
t
RFCP
RFDC
t
t
t
t
RFTT
SPW
HZD
ZHD
PLD
t
RJIT
DJIT
TCP
LZD
ZLD
SD
/
HIGH to TRI-STATE
TRI-STATE to HIGH
LOW to TRI-STATE
TRI-STATE to LOW
Receiver out Clock
ROUT (0-9) Setup
Deserializer Delay
RCLK Duty Cycle
ROUT (0-9) Hold
Transition Time
Transition Time
Data to RCLK
Data to RCLK
Serializer PLL Lock Time
REFCLK Transition Time
Low-to-High
High-to-Low
CMOS/TTL
CMOS/TTL
Parameter
DO
DO
REFCLK Duty Cycle
Ratio of REFCLK to
SYNC Pulse Width
Period
Deterministic Jitter
TRI-STATE Delay
TRI-STATE Delay
Delay
Delay
Delay
Delay
REFCLK Period
Serializer Delay
DO
DO
Random Jitter
±
±
HIGH Delay
LOW Delay
Parameter
Parameter
Figure 15
TRI-STATE to
TRI-STATE to
±
±
TCLK
HIGH to
LOW to
Conditions
CL = 15 pF
t
RCP
Figure 11
Figure 12
Figure 9
Figure 4
= t
Figure 9 R
C
Figure 7 (Note 4)
TCP
L
=10pF to GND
Conditions
Conditions
R
R
L
Figure 8
35 MHz
80 MHz
L
= 100 ,
= 100
L
= 100
Rout(0-9),
Rout(0-9),
Pin/Freq.
LOCK,
RCLK
RCLK
RCLK
LOCK
RCLK
(Continued)
4
t
510*t
TCP
−0.35*t
0.35*t
1.75*t
5*t
-240
12.5
0.95
Min
Min
-75
40
12.5
Min
TCP
+ 2
+ 1.0
45
TCP
RCP
RCP
RCP
1.75*t
−0.5*t
0.5*t
t
Typ
2.2
2.2
2.3
2.9
TCP
50
RCP
2
2
RCP
Typ
Typ
RCP
2.3
1.9
1.0
1.0
10
50
T
+ 2.0
+ 5
1.75*t
Max
40
55
10
10
10
10
RCP
t
4
4
513*t
TCP
6*t
Max
Max
1.05
140
100
10
10
10
10
40
60
+ 7
6
TCP
+ 4.0
TCP
Units
ps(rms)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
Units
Units
ns
ns
ns
ns
ps
ns
ns
ns
ns
ps
ns
%