MAX9206EAI+ Maxim Integrated Products, MAX9206EAI+ Datasheet - Page 3

• Manufacturer Part Number: MAX9206EAI+
• Description: IC DESERIALIZER LVDS 28-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX9206EAI+

• Function: Deserializer
• Data Rate: 660Mbps
• Input Type: LVDS
• Output Type: LVTTL, LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 10
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Input Current: +/- 15 uA
• Input Voltage Range (max): 3.6 V
• Interface Type: Parallel LVCMOS/LVTTL
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Settling Time: 3000 ps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AC ELECTRICAL CHARACTERISTICS
(V
to 2.4V -
0.2V, T
AVCC
REFERENCE CLOCK TIMING REQUIREMENTS (REFCLK)
REFCLK Frequency
REFCLK Frequency Variation
REFCLK Period
REFCLK Duty Cycle
REFCLK Input Transition Time
SWITCHING CHARACTERISTICS
Low-to-High Transition Time
High-to-Low Transition Time
Deserializer Delay
ROUT_ Data Valid Before RCLK
ROUT_ Data Valid After RCLK
RCLK Duty Cycle
Recovered Clock (RCLK)
Period (Note 6)
OUTPUT High-to-High
Impedance Delay
OUTPUT Low-to-High
Impedance Delay
OUTPUT High-Impedance to
High-State Delay
OUTPUT High-Impedance to
Low-State Delay
PLL Lock Time (from PWRDN
Transition High)
A
= V
= +25°C.) (Notes 4, 5)
|
V
PARAMETER
ID
DVCC
/2
|
, T
= +3.0V to +3.6V, C
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
_______________________________________________________________________________________
SYMBOL
L
RFDC
t
t
RFFV
t
t
t
t
t
t
t
t
t
f
RFCP
t
t
DSR1
RFTT
t
ROH
RDC
= 15pF, differential input voltage
RCP
CLH
CHL
ROS
HZR
ZHR
RFF
LZR
ZLR
DD
MAX9206
MAX9208
MAX9206
MAX9208
MAX9206
MAX9208
Figure 3
Figure 3
Figure 4
Figure 5
Figure 5
C
C
C
C
Sync patterns at input; supply and
REFCLK stable; measured from
PWRDN transition high to LOCK
transition low; Figure 7
10-Bit Bus LVDS Deserializers
L
L
L
L
= 5pF, Figure 6
= 5pF, Figure 6
= 5pF, Figure 6
= 5pF, Figure 6
CONDITIONS
MAX9206, 45MHz
MAX9208, 60MHz
|
V
ID
|
= 0.15V to 1.2V, common-mode voltage V
AVCC
1.75 x t
1.75 x t
0.4 x t
0.4 x t
22.222
16.666
22.222
16.666
+ 1.1
-200
= V
MIN
+ 2
43
16
40
30
RCP
RCP
RCP
RCP
DVCC
1.75 x t
1.75 x t
= +3.3V, V
+ 3.3
+ 3.3
TYP
0.5 x t
0.5 x t
1.5
50
50
3
2
RCP
RCP
RCP
RCP
(2048 + 42)
1.75 x t
1.75 x t
x t
62.500
CM
62.500
MAX
200
+ 6.5
+ 5.6
45
60
25
70
RFCP
6
25
57
3
3
8
8
6
6
= 1.1V,
RCP
RCP
CM
=
UNITS
MHz
ppm
|
|
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
V
ID
ID
|
/2
3
=
|