PI2EQX5804CNJE Pericom Semiconductor, PI2EQX5804CNJE Datasheet - Page 14

• Manufacturer Part Number: PI2EQX5804CNJE
• Description: IC PCI-E REDRIVER 100LBGA
• Manufacturer: Pericom Semiconductor
• Series: ReDriver™r
• Type: Redriverr

Specifications of PI2EQX5804CNJE

• Tx/rx Type: CML
• Capacitance - Input: 50pF
• Voltage - Supply: 1.15 V ~ 1.25 V
• Current - Supply: 800mA
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time: -
• Lead Free Status / Rohs Status: Details

BYTE 6 - Power Down Control (PWR)
PD_xy# =0=channel off/power down, PD_xy# =1=normal operation, Latch from PD# input at startup
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The Power Down Control register allows for individual control over each channel for power savings. When
PD_xy# is logic 0 the channel is turned off. When PD_xy# is 1 then the channel is enabled for normal
operation.
BYTE 7 - Receiver Detect Enable (RXD)
RXD_xy =0=channel off/power down, RXD_xy =1=normal operation, Latch from PD# input at startup
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The Receiver Detect Enable register allows for control of the receiver detect state machine for each individual
channel. When RXD_xy is set to 0, then the receiver detect function is disabled. When RXD_xy is logic 1,
then the receiver detect state machine is enabled for operation. The initial state of the register bits are deter-
mined by the RXD_A and RXD_B input pins during power-up.
BYTE 8 - A-Channels Equalizer and Output Control (AEOC)
SELx_A: Equalizer confi guration, Dx_A: Emphasis control, Sx_A: Output level control (see Confi guration Table)
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The A-Channels Equalizer and Output Control register is used to control the confi guration of the input equal-
izer and output emphasis and levels of the four A channels. These register bits are loaded from the input con-
fi guration pins of the same name at power-on. These bits may be changed if the MODE# input is set to allow
I
2
C confi guration. Please refer to the tables (1) Equalizer Confi guration, (2) Output Swing Confi guration and
Power-on
Power-on
Power-on
Name
Name
Name
Type
State
Type
State
Type
State
Bit
Bit
Bit
09-0001
RXD_A0
PD_A0#
SEL0_A
SEL0_A
RXD_A
R/W
R/W
R/W
PD#
7
7
7
RXD_B0
SEL1_A
PD_B0#
SEL1_A
RXD_B
R/W
R/W
R/W
PD#
6
6
6
RXD_A1
PD_A1#
SEL2_A
SEL2_A
RXD_A
R/W
R/W
R/W
PD#
5
5
5
RXD_B1
PD_B1#
RXD_B
D0_A
D0_A
R/W
R/W
R/W
PD#
14
4
4
4
RXD_A2
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with
PD_A2#
RXD_A
D1_A
D1_A
R/W
R/W
R/W
PD#
3
3
3
RXD_B2
PD_B2#
RXD_B
D2_A
D2_A
R/W
R/W
R/W
PD#
2
2
2
Equalization & Emphasis
RXD_A3
PD_A3#
RXD_A
S0_A
S0_A
R/W
R/W
R/W
PD#
1
1
1
PS8926B
PI2EQX5804C
RXD_B3
PD_B3#
RXD_B
S1_A
S1_A
R/W
R/W
R/W
PD#
0
0
0
06/08/09