PI2EQX5804CNJE Pericom Semiconductor, PI2EQX5804CNJE Datasheet - Page 18

IC PCI-E REDRIVER 100LBGA

PI2EQX5804CNJE

Manufacturer Part Number
PI2EQX5804CNJE
Description
IC PCI-E REDRIVER 100LBGA
Manufacturer
Pericom Semiconductor
Series
ReDriver™r
Type
Redriverr
Datasheet

Specifications of PI2EQX5804CNJE

Tx/rx Type
CML
Capacitance - Input
50pF
Voltage - Supply
1.15 V ~ 1.25 V
Current - Supply
800mA
Mounting Type
Surface Mount
Package / Case
100-LBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time
-
Lead Free Status / Rohs Status
 Details

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Equalizer
Notes
1. K28.7 pattern is applied differentially at point A as shown in AC test circuit (see fi gure).
2. Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum
CML Transmitter Output
Note:
1. Recommended external blocking capacitor.
Digital I/O DC Specifi cations (VDD = 1.2V ± 0.05V, T
Notes:
1. Includes input signals A1, A2, A4, Dx_[A:B], DE_[A:B], LB#, MODE#, PD#, RESET#, RXD_[A:B], Sx_[A:B], SCL, SDA, SEL_x[A:B]
2. For control inputs without pullups: A1, A2, A4, SCL, SDA
3. Control inputs with pull-ups include: Dx_[A:B], DE_[A:B], LB#, MODE#, PD#, RESET#, RXD_[A:B], Sx_[A:B], SEL_x[A:B]
Symbol
J
J
J
Symbol
Z
Z
V
V
V
t
C
Symbol
V
V
V
V
V
I
I
I
F
IH
IL1
IL2
RS-T
RS-D
RM
OUT
TX-DIFF-DC
deterministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or
equivalent for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or its
equivalent. The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. Jitter is measured at 0V
at point C of the AC test circuit (see fi gure).
, t
TX
DIFFP
TX-DIFFP-P
TX-C
IH
IL
OH
OL
hys
(1)
R
(2)
(3)
(1)
09-0001
Parameter
DC input logic high
DC input logic low
DC output logic high
DC output logic low
Hysteresis of Schmitt trigger input
Input high current
Input low current
Input low current
Parameter
Residual jitter
Residual jitter
Random jitter
Parameter
Output resistance
DC Differential TX Imped-
ance
Output Voltage Swing, Dif-
ferential
Differential Peak-to-peak
Ouput Voltage
Common-Mode Voltage
Transition Time
AC Coupling Capacitor
(VDD = 1.2V ± 0.05V, T
Conditions
Total
Deterministic
Note 2
Conditions
Single ended
|VTX-D+ - VTX-D-|
VTX-DIFFP-P = 2 * | VTX-D+ -
VTX-D- |
| VTX-D+ + VTX-D- | / 2
20% to 80% (3)
A
= 0 to 70°C)
Conditions
I
I
OH
OL
18
= 4mA
= 4mA
A
= 0 to 70°C)
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with
VDD/2 +0.2
VDD-0.4
Min.
-0.3
-20
-20
0.2
Min.
Min.
200
0.4
40
80
75
VDD- 0.3
Typ.
Equalization & Emphasis
Typ.
Typ.
100
50
1.5
VDD/2 -0.2
VDD+0.3
Max.
100
Max.
0.4
PS8926B
Max.
PI2EQX5804C
0.3
0.2
120
800
150
200
1.6
60
mVp-p
psrms
Ohms
Ohms
Units
Ulp-p
Ulp-p
Units
Units
nF
ps
V
V
μA
μA
μA
06/08/09
V
V
V
V
V

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