PI7C9X7952AFDE Pericom Semiconductor, PI7C9X7952AFDE Datasheet - Page 29

• Manufacturer Part Number: PI7C9X7952AFDE
• Description: IC PCIE-TO-UART BRIDGE 128LQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X7952AFDE

• Applications: PCIe-to-Uart Bridge
• Interface: Advanced Configuration Power Interface (ACPI)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.2.21. PPB SUPPORT EXTENSIONS – OFFSET 84h
6.2.22. PM DATA REGISTER – OFFSET 84h
6.2.23. MESSAGE SIGNALED INTERRUPTS (MSI) Capability ID Register 8Ch
6.2.24. MESSAGE SIGNALED INTERRUPTS (MSI) NEXT ITEM POINTER 8Ch
6.2.25.
6.2.26.
September 2009 – Revision 1.3
Pericom Semiconductor
MESSAGE ADDRESS REGISTER – OFFSET 90h
MESSAGE UPPER ADDRESS REGISTER – OFFSET 94h
BIT
7:4
8
12:9
14:13
15
BIT
21:16
22
23
BIT
31:24
BIT
7:0
BIT
15:8
BIT
1:0
31:2
FUNCTION
Enhanced
Capability ID
Next Item Pointer
FUNCTION
Reserved
PME# Enable
Data Select
Data Scale
PME status
FUNCTION
Reserved
B2_B3 Support for
D3
Bus Power / Clock
Control Enable
FUNCTION
PM Data Register
FUNCTION
FUNCTION
Reserved
Message Address
HOT
09-0087
RO
RW
TYPE
TYPE
TYPE
TYPE
TYPE
TYPE
RO
RO
RW
RW
RO
RO
RO
RO
RO
RO
RO
Page 29 of 68
DESCRIPTION
Read as 05h to indicate that this is Message Signaled Interrupt
capability register.
DESCRIPTION
Reset to 000000b.
Does not apply to PCI Express. Must be hardwired to 0b.
Does not apply to PCI Express. Must be hardwired to 0b.
DESCRIPTION
PM Data Register.
Reset to 00h
DESCRIPTION
The pointer points to the Vendor Specific capability register (9Ch).
Reset to 9Ch.
DESCRIPTION
Reset to 00b.
If the message enable bit is set, the contents of this register specify
the DWORD aligned address for MSI memory write transaction.
Reset to 0.
DESCRIPTION
auto-loading from EEPROM.
Reset to 0b.
Read as 0h.
When asserted, the I/O bridge will generate the PME# message.
Reset to 0b.
Select data registers.
Reset to 0h.
Read as 00b.
Indicates that the PME# message is pending internally to the I/O
bridge.
Reset to 0b.
PCI Express® Dual UART
PI7C9X7952
Datasheet