PI7C9X7952AFDE Pericom Semiconductor, PI7C9X7952AFDE Datasheet - Page 5

• Manufacturer Part Number: PI7C9X7952AFDE
• Description: IC PCIE-TO-UART BRIDGE 128LQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X7952AFDE

• Applications: PCIe-to-Uart Bridge
• Interface: Advanced Configuration Power Interface (ACPI)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

September 2009 – Revision 1.3
Pericom Semiconductor
6.2.14.
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100h
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CAPABILITIES POINTER REGISTER – OFFSET 34h.........................................................27
INTERRUPT LINE REGISTER – OFFSET 3Ch....................................................................27
INTERRUPT PIN REGISTER – OFFSET 3Ch......................................................................28
POWER MANAGEMENT CAPABILITY ID REGISTER – OFFSET 80h...............................28
NEXT ITEM POINTER REGISTER – OFFSET 80h..............................................................28
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 80h ................................28
POWER MANAGEMENT DATA REGISTER – OFFSET 84h ...............................................28
PPB SUPPORT EXTENSIONS – OFFSET 84h.....................................................................29
PM DATA REGISTER – OFFSET 84h...................................................................................29
MESSAGE SIGNALED INTERRUPTS (MSI) Capability ID Register 8Ch ...........................29
MESSAGE SIGNALED INTERRUPTS (MSI) NEXT ITEM POINTER 8Ch ..........................29
MESSAGE ADDRESS REGISTER – OFFSET 90h................................................................29
MESSAGE UPPER ADDRESS REGISTER – OFFSET 94h ..................................................29
MESSAGE DATA REGISTER – OFFSET 98h .......................................................................30
VPD CAPABILITY ID REGISTER – OFFSET 9Ch ...............................................................30
NEXT ITEM POINTER REGISTER – OFFSET 9Ch .............................................................30
VPD REGISTER – OFFSET 9Ch ..........................................................................................30
VPD DATA REGISTER – OFFSET A0h ................................................................................30
VENDOR SPECIFIC CAPABILITY ID REGISTER – OFFSET A4h .....................................30
NEXT ITEM POINTER REGISTER – OFFSET A4h .............................................................31
LENGTH REGISTER – OFFSET A4h ...................................................................................31
XPIP CSR0 – OFFSET A8h (Test Purpose Only) ..................................................................31
XPIP CSR1 – OFFSET ACh (Test Purpose Only) .................................................................31
REPLAY TIME-OUT COUNTER – OFFSET B0h .................................................................31
ACKNOWLEDGE LATENCY TIMER – OFFSET B0h ..........................................................31
UART DRIVE SETTING – OFFSET B4h ..............................................................................31
Power Management Control Parameter – OFFSET B8h ......................................................32
DEBUG REGISTER 1 – OFFSET BCh (Test Purpose Only) ................................................32
DEBUG REGISTER 2 – OFFSET C0h (Test Purpose Only).................................................32
DEBUG REGISTER 3 – OFFSET C4h (Test Purpose Only).................................................32
DEBUG REGISTER 4 – OFFSET C8h (Test Purpose Only).................................................32
GPIO CONTROL REGISTER – OFFSET D8h......................................................................33
EEPROM CONTROL REGISTER – OFFSET DCh...............................................................33
PCI EXPRESS CAPABILITY ID REGISTER – OFFSET E0h................................................33
NEXT ITEM POINTER REGISTER – OFFSET E0h .............................................................33
PCI EXPRESS CAPABILITIES REGISTER – OFFSET E0h .................................................34
DEVICE CAPABILITIES REGISTER – OFFSET E4h...........................................................34
DEVICE CONTROL REGISTER – OFFSET E8h .................................................................34
DEVICE STATUS REGISTER – OFFSET E8h ......................................................................35
LINK CAPABILITIES REGISTER – OFFSET ECh ...............................................................36
LINK CONTROL REGISTER – OFFSET F0h.......................................................................36
LINK STATUS REGISTER – OFFSET F0h ...........................................................................37
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY ID REGISTER – OFFSET
37
CAPABILITY VERSION – OFFSET 100h..............................................................................37
NEXT ITEM POINTER REGISTER – OFFSET 100h............................................................37
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h.....................................37
UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h........................................38
UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch ................................39
CORRECTABLE ERROR STATUS REGISTER – OFFSET 110h...........................................40
CORRECTABLE ERROR MASK REGISTER – OFFSET 114h .............................................40
ADVANCE ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h.............41
HEADER LOG REGISTER – OFFSET From 11Ch to 128h .................................................41
09-0087
Page 5 of 68
PCI Express® Dual UART
PI7C9X7952
Datasheet