ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 55

• Manufacturer Part Number: ISP1563BMGA
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMGA

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-S; ISP1563BM-S

Philips Semiconductors
[1]
Table 72:
Address: Value read from func0 or func1 of address 10h + 3Ch
[1]
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
The reserved bits should always be written with the reset value.
HcFmNumber - Host Controller Frame Number register bit allocation
11.1.16 HcFmNumber register
R/W
R/W
R/W
R/W
R/W
31
23
15
7
0
0
0
0
7
0
reserved
Table 71:
Address: Value read from func0 or func1 of address 10h + 38h
This register is a 16-bit counter, and the bit allocation is given in
timing reference among events happening in the Host Controller and the HCD. The HCD
may use the 16-bit value specified in this register and generate a 32-bit frame number,
without requiring frequent access to the register.
Bit
31
30 to 14 reserved
13 to 0
[1]
R/W
R/W
R/W
R/W
R/W
30
22
14
6
0
0
0
0
6
0
Symbol
FRT
FR[13:0]
HcFmRemaining - Host Controller Frame Remaining register bit description
R/W
R/W
R/W
R/W
R/W
29
21
13
5
0
0
0
0
5
0
Description
Frame Remaining Toggle: This bit is loaded from FIT (bit 31 of
HcFmInterval) whenever FR[13:0] reaches 0. This bit is used by the HCD
for the synchronization between FI[13:0] (bits 13 to 0 of HcFmInterval) and
FR[13:0].
-
Frame Remaining: This counter is decremented at each bit time. When it
reaches 0, it is reset by loading the FI[13:0] value specified in HcFmInterval
at the next bit time boundary. When entering the USBOPERATIONAL state,
the Host Controller reloads the content with FI[13:0] of HcFmInterval and
uses the updated value from the next SOF.
Rev. 01 — 14 July 2005
R/W
R/W
R/W
R/W
R/W
28
20
12
4
0
0
0
0
4
0
reserved
reserved
FR[7:0]
FN[7:0]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
27
19
11
3
0
0
0
0
3
0
FN[13:8]
R/W
R/W
R/W
R/W
R/W
26
18
10
2
0
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
Table
R/W
R/W
R/W
R/W
R/W
25
17
1
0
72. It provides a
0
0
9
0
1
0
ISP1563
R/W
R/W
R/W
R/W
R/W
55 of 107
24
16
0
0
0
0
8
0
0
0