BMA250 Bosch Sensortec, BMA250 Datasheet - Page 60
Manufacturer Part Number
3-AXIS ACCELEROMETER DIGITAL I/F
Specifications of BMA250
BMA250 - Digital, Triaxial Acceleration Sensor
X, Y, Z
±2g, 4g, 8g, 16g
256LSB/g, 128LSB/g, 64LSB/g, 16LSB/g
Voltage - Supply
1.62 V ~ 3.6 V
8Hz ~ 1kHz
Package / Case
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With
828-1024 - BMA250 DAUGHTERCARD FOR DEV KIT
I²C write access:
I²C write access can be used to write a data byte in one sequence.
The sequence begins with start condition generated by the master, followed by 7 bits slave
address and a write bit (RW = 0). The slave sends an acknowledge bit (ACK = 0) and releases
the bus. Then the master sends the one byte register address. The slave again acknowledges
the transmission and waits for the 8 bits of data which shall be written to the specified register
address. After the slave acknowledges the data byte, the master generates a stop signal and
terminates the writing protocol.
Example of an I²C write access:
I²C read access:
I²C read access also can be used to read one or multiple data bytes in one sequence.
A read sequence consists of a one-byte I²C write phase followed by the I²C read phase. The two
parts of the transmission must be separated by a repeated start condition (Sr). The I²C write
phase addresses the slave and sends the register address to be read. After slave
acknowledges the transmission, the master generates again a start condition and sends the
slave address together with a read bit (RW = 1). Then the master releases the bus and waits for
the data bytes to be read out from slave. After each data byte the master has to generate an
acknowledge bit (ACK = 0) to enable further data transfer. A NACKM (ACK = 1) from the master
stops the data being transferred from the slave. The slave releases the bus so that the master
can generate a STOP condition and terminate the transmission.
The register address is automatically incremented and, therefore, more than one byte can be
sequentially read out. Once a new data read transmission starts, the start address will be set to
the register address specified in the latest I²C write command. By default the start address is set
at 0x00. In this way repetitive multi-bytes reads from the same starting address are possible.
In order to prevent the I²C slave of the device to lock-up the I²C bus, a watchdog timer (WDT) is
implemented. The WDT observes internal I²C signals and resets the I²C interface if the bus is
locked-up by the BMA250. The activity and the timer period of the WDT can be configured
through the bits (0x34) i2c_wdt_en and (0x34) i2c_wdt_sel.
Writing ´1´ (´0´) to (0x34) i2c_wdt_en activates (de-activates) the WDT. Writing ´0´ (´1´) to
(0x34) i2c_wdt_se selects a timer period of 1 ms (50 ms).
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such
as copying and passing on to third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice.
Page 60 / not for publishing
Figure 16: I²C write
Register adress (0x10)
03 March 2011