M25PX64-VMF6TP Micron Technology Inc, M25PX64-VMF6TP Datasheet - Page 28

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M25PX64-VMF6TP

Manufacturer Part Number
M25PX64-VMF6TP
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M25PX64-VMF6TP

Cell Type
NOR
Density
64Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Address Bus
24b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
8M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
16
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Write enable (WREN)
The write enable (WREN) instruction
The write enable latch (WEL) bit must be set prior to every page program (PP), dual input
fast program (DIFP), program OTP (POTP), write to lock register (WRLR), subsector erase
(SSE), sector erase (SE), bulk erase (BE) and write status register (WRSR) instruction.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 9.
Write enable (WREN) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
(Figure
1
2
Instruction
3
9) sets the write enable latch (WEL) bit.
4
5
6
7
AI13731

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