MT48LC4M32LFF5-10:G TR Micron Technology Inc, MT48LC4M32LFF5-10:G TR Datasheet - Page 21

• Manufacturer Part Number: MT48LC4M32LFF5-10:G TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48LC4M32LFF5-10:G TR

• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 22/8/7ns
• Maximum Clock Rate: 100MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 110mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Partial-Array Self Refresh (PASR)
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. L 10/07 EN
Every cell in the DRAM requires refreshing due to the capacitor losing its charge over
time. The refresh rate is dependent on temperature. At higher temperatures a capacitor
loses charge quicker than at lower temperatures, requiring the cells to be refreshed more
often. Historically, during self refresh, the refresh rate has been set to accommodate the
worst case, or highest temperature range, expected.
Thus, during ambient temperatures, the power consumed during refresh was unneces-
sarily high because the refresh rate was set to accommodate the higher temperatures.
Setting E4 and E3 allows the DRAM to accommodate more specific temperature regions
during self refresh. There are four temperature settings, which will vary the self refresh
current according to the selected temperature. This selectable refresh rate will save
power when the DRAM is operating at normal temperatures.
For further power savings during self refresh, the PASR feature allows the controller to
select the amount of memory that will be refreshed during self refresh. The refresh
options are all banks (banks 0, 1, 2, and 3); two banks (banks 0 and 1); and one bank
(bank 0). WRITE and READ commands occur to any bank selected during standard
operation, but only the selected banks in PASR will be refreshed during self refresh. It’s
important to note that data in banks 2 and 3 will be lost when the two-bank option is
used. Data will be lost in banks 1, 2, and 3 when the one-bank option is used.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile SDRAM
©2001 Micron Technology, Inc. All rights reserved.
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