PCF8584P NXP Semiconductors, PCF8584P Datasheet - Page 25

• Manufacturer Part Number: PCF8584P
• Manufacturer: NXP Semiconductors

Specifications of PCF8584P

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: PDIP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Notes
1. A minimum of 6 clock cycles must elapse between consecutive parallel-bus accesses when the I
2. Not for S1.
1997 Oct 21
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVCL
WLCL
RHCL
CLDV
CLDL
CHAI
CHRL
CHWH
CHDF
CHDE
CHDI
DVCL
ALIE
ALDV
ALAE
AHDI
ALDL
AHDE
W4
W5
CLCL
SYMBOL
I
2
operates at 8 or 12 MHz. This may be reduced to 3 clock cycles for lower operating frequencies.
C-bus controller
A0 set-up to CS LOW
R/WR set-up to CS LOW
R/WR set-up to CS LOW
data valid after CS LOW
DTACK LOW after CS LOW
A0 hold from CS HIGH
R/WR hold from CS HIGH
R/WR hold from CS HIGH
data bus float after CS HIGH
DTACK HIGH from CS HIGH
data hold after CS HIGH
data set-up to CS LOW
INT HIGH from IACK LOW
data valid after IACK LOW
IACK pulse width
data hold after IACK HIGH
DTACK LOW from IACK LOW
DTACK HIGH from IACK HIGH see Fig.20
RESET pulse width
STROBE pulse width
CS LOW
PARAMETER
see Figs 17 and 18
see Fig.17
see Fig.18
see Fig.18 and note 2
see Figs 17 and 18
see Fig.18
see Fig.18
see Fig.17
see Fig.18
see Figs 17 and 18
see Fig.17
see Fig.17
see Figs 19 and 20
see Figs 19 and 20
see Fig.20
see Fig.20
see Fig.20
see Fig.21
see Fig.22
see Figs 17 and 18
CONDITIONS
25
10
10
10
0
0
0
0
0
230
30t
8t
CLK
MIN.
CLK
160
2t
100
130
200
2t
120
8t
t
CLDL
CLK
CLK
CLK
TYP.
+ t
+ 75
+ 75
+ 90
CHDE
180
3t
150
120
180
250
30
3t
140
Product specification
CLK
CLK
2
MAX.
C-bus controller
PCF8584
+ 150 ns
+ 150 ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT