TC58FVM5T2ATG65 Toshiba, TC58FVM5T2ATG65 Datasheet - Page 11

• Manufacturer Part Number: TC58FVM5T2ATG65
• Manufacturer: Toshiba

Specifications of TC58FVM5T2ATG65

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 65ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 2.5/3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP-I
• Program/erase Volt (typ): 8.5 to 9.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 55mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Program Suspend/Resume Mode
Program Suspend command in Write Mode (including Write operations performed during Erase Suspend) but
ignores the command in other modes. When the command is input, the address of the bank on which Write is
being performed must be specified. After input of the command, the device will enter Program Suspend Read
Mode after t
is suspended, the address to which Write was being performed becomes undefined. ID Read and CFI Data Read
are the same as usual.
inputting the command, specify the address of the bank on which Write is being performed. If the ID Read or
CFI Data Read functions is being used, abort the function before inputting the Resume command. On receiving
the Resume command, the device returns to Write Mode and resumes outputting the Hardware Sequence flag
for the bank to which data is being written.
Program Suspend in Acceleration Mode, V
Auto Chip Erase Mode
rising edge of WE in the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and
verified as erased by the chip. The device status is indicated by the Hardware Sequence flag.
operation. If an Auto Chip Erase operation is interrupted, it cannot be completed correctly. Hence an additional
Erase operation must be performed.
be executed and the device will enter Read mode 250µs after the rising edge of the WE signal in the sixth bus
cycle.
Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware
reset is required to return the device to Read Mode after a failure.
altogether, or perform a Block Erase on each block, identify the failed blocks, and stop using them. To build a
more reliable system, the host processor should take measures to prevent subsequent use of failed blocks.
Program Suspend is used to enable Data Read by suspending the Write operation. The device accepts a
During Program Suspend, Cell Data Read, ID Read and CFI Data Read can be performed. When Data Write
After completion of Program Suspend input a Program Resume command to return to Write Mode. When
Program Suspend can be run in Fast Program Mode or Acceleration Mode. However, note that when running
The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the
Command input is ignored during an Auto Chip Erase. A hardware reset can interrupt an Auto Chip Erase
Any attempt to erase a protected block is ignored. If all blocks are protected, the Auto Erase operation will not
If an Auto Chip Erase operation fails, the device will remain in the erasing state and will not return to Read
In this case it cannot be ascertained which block the failure occurred in. Either abandon use of the device
SUSP
.
ACC
must not be released.
TC58FVM5(T/B)(2/3)A(FT/XB)65
2003-06-30 11/64