MT46V8M16TG-75Z Micron Technology Inc, MT46V8M16TG-75Z Datasheet - Page 12

MT46V8M16TG-75Z

Manufacturer Part Number
MT46V8M16TG-75Z
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V8M16TG-75Z

Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
750ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
140mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Electrical Specifications – I
Table 6:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
128Mb_DDR_x4x8x16_D2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
Parameter/Condition
Operating one-bank active-precharge current:
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one-bank active-read-precharge current:
Burst = 2;
and control inputs
Precharge power-down standby current: All banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All banks are idle;
t
changing once per clock
Active power-down standby current: One bank active;
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One bank
active
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: Burst = 2;
reads; One bank active; Address and control inputs changing once
per clock cycle;
Operating burst write current: Burst = 2; Continuous burst
writes;
once per clock cycle;
changing twice per clock cycle
Auto refresh burst current:
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four bank
interleaving READs (Burst = 4) with auto precharge;
t
inputs change only during ACTIVE, READ, or WRITE commands
RC =
CK =
RC = minimum
;
t
t
RC (MIN);
CK (MIN);
t
One bank
RC =
t
RC =
t
RAS (MAX);
I
V
0°C ≤ T
t
DD
CK =
DD
t
t
CK =
t
RC allowed;
RC (MIN);
t
Q = +2.6V ±0.1V, V
CKE = HIGH; Address and other control inputs
Specifications and Conditions (x4, x8; -5B, -6T, -75E, -75Z, -75)
CK =
active; Address and control inputs changing
t
changing once per clock cycle
t
A
CK (MIN); CKE = LOW
CK =
t
t
CK =
CK (MIN);
≤ +70°C; Notes: 1–5, 11, 13, 15, 47; Notes appear on pages 26–31; See also Table 8 on page 14
t
CK (MIN); DQ, DM, and DQS inputs
cycle.
t
CK =
t
CK (MIN); CKE = (LOW)
t
CK (MIN); DQ, DM, and DQS inputs
t
CK =
t
CK =
V
t
CK (MIN); DQ, DM, and DQS inputs
I
IN
OUT
t
CK (MIN); I
=
t
CK (MIN); Address and control
DD
V
= 0mA
REF
= +2.6V ±0.1V (-5B); V
for DQ, DQS, and DM
DD
OUT
Continuous burst
t
t
Standard
Low power (L)
RFC =
RFC = 15.6µs
= 0mA; Address
t
RFC (MIN)
Power-
12
DD
Q = +2.5V ±0.2V, V
Symbol -5B
I
I
I
I
I
I
I
I
DD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
DD
DD
I
I
DD
DD
I
I
I
DD 2
DD
DD
DD
DD
DD
DD
4W
3N
5A
6A
3P
4R
2F
0
1
5
6
7
P
128Mb: x4, x8, x16 DDR SDRAM
115
135
165
165
240
355
1.3
50
30
50
3
6
4
Electrical Specifications – I
DD
125
135
145
145
265
355
-6T
1.3
= +2.5V ±0.2V (-6T, -75E, -75Z, -75);
45
25
50
3
5
4
-75E -75Z/-75 Units Notes
110
120
130
130
220
330
1.3
45
25
50
3
5
4
©2004 Micron Technology, Inc. All rights reserved.
105
120
130
130
220
325
1.3
40
25
45
3
5
4
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
23, 48
23, 48
24, 33
24, 33
23, 48
28, 50
23, 49
51
23
23
50
12
12
DD

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