CYNSE70064A-66BGC Cypress Semiconductor Corp, CYNSE70064A-66BGC Datasheet - Page 101

• Manufacturer Part Number: CYNSE70064A-66BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70064A-66BGC

• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 1.9V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

12.0
Table 12-1 describes the commands used to generate addresses on the SRAM address bus. The index [14:0] field contains the
address of a 68-bit entry that results in a hit in 68-bit-configured partition. It is the address of the 68-bit entry that lies at the 136-bit
page boundary, and the 272-bit page boundaries in 136-bit- and 272-bit-configured quadrants, respectively.
Section 7.0, “Registers” on page 13 of this specification, describes the NFA and SSR registers. ADR[14:0] contains the address
supplied on the DQ bus during PIO access to the CYNSE70064A. Command bits 8, and 7 {CMD[8:7]} are passed from the
command to the SRAM address bus. See Section 10.0, “Commands” on page 18, for more information. ID[4:0] is the ID of the
device driving the SRAM bus (see Section 18.0, “Pinout Descriptions and Package Diagrams” on page 122, for more information).
Document #: 38-02041 Rev. *F
SRAM Addressing
DQ[67:0]
FULO[1]
Figure 11-3. Full Generation in a Cascaded Table
3
FULO[1]
3
3
2
FULI
FULI
FULI
FULO[1]
2
2
1
FULO[1]
1
1
0
0
0
CYNSE70064A
CYNSE70064A
CYNSE70064A
CYNSE70064A
CYNSE70064A
CYNSE70064A
CYNSE70064A
CYNSE70064A
FULO[0]
6
6
6
6
6
6
6
6
FULO[0]
5
5
5
5
5
5
5
5
FULO[0]
4
4
4
4
4
FULI
4
FULI
FULI
FULI
FULI
FULO[0]
FULI
4
4
FULO[1] FULO[0]
FULI
FULI
3
3
3
3
3
FULO[0]
2
2
2
2
FULO[0]
2
FULO[0]
1
1
1
1
1
0
0
0
0
0
FULL
FULL
FULL
FULL
FULL
FULL
FULL
CYNSE70064A
V
V
FULL
V
V
V
V
V
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
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