TE28F128J3D75 Micron Technology Inc, TE28F128J3D75 Datasheet - Page 17

• Manufacturer Part Number: TE28F128J3D75
• Manufacturer: Micron Technology Inc

Specifications of TE28F128J3D75

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 75ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 24/23Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 16M/8M
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

Numonyx™ Embedded Flash Memory (J3 v. D)
4.2
Figure 8:
Notes:
1.
2.
4.3
Table 3:
November 2007
308551-05
A[MAX:1]
Symbol
D[7:0]
A0
A22 exists on 64- and 128- densities. On 32-Mbit density this signal is a no-connect (NC).
A23 exists on 128-Mbit densities. On 32- and 64-Mbit densities this signal is a no-connect (NC)
56-Lead TSOP Package Pinout (32/64/128 Mbit)
Signal Descriptions for Numonyx™ Embedded Flash Memory (J3 v. D) (Sheet 1
GND
V
RP#
CE
V
CE
A
A
A
A
A
A
A
A
A
A
A
PEN
A
A
Output
56-Lead TSOP Package Pinout (32/64/128 Mbit)
CC
Signal Descriptions
Table 3
and provides a description of each.
of 2)
Input/
A
A
A
A
A
A
A
A
A
Type
Input
Input
22
21
20
19
18
17
16
15
14
13
12
11
10
1
0
9
8
7
6
5
4
3
2
1
lists the active signals used on Numonyx™ Embedded Flash Memory (J3 v. D)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
BYTE-SELECT ADDRESS: Selects between high and low byte when the device is in x8 mode. This
address is latched during a x8 program cycle. Not used in x16 mode (i.e., the A0 input buffer is
turned off when BYTE# is high).
ADDRESS INPUTS: Inputs for addresses during read and program operations. Addresses are
internally latched during a program cycle:
32-Mbit — A[21:1]
64-Mbit— A[22:1]
128-Mbit — A[23:1]
256-Mbit — A[24:1] A24 acts as a virtual CE for the two devices. A24 at V
and A24 at V
LOW-BYTE DATA BUS: Inputs data during buffer writes and programming, and inputs commands
during CUI writes. Outputs array, CFI, identifier, or status data in the appropriate read mode. Data
is internally latched during write operations.
1
2
3
4
5
6
7
8
9
IH
selects the upper die.
Intel® Embedded Flash Memory
32/64/128 Mbit
14 mm x 20 mm
Standard Pinout
56-Lead TSOP
(28FXXXJ3D)
Top View
Name and Function
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
IL
RFU
V
V
A
A
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
CE
WE#
OE#
STS
GND
GND
selects the lower die
BYTE#
0
23
CCQ
CC
2
15
7
14
6
13
5
12
4
11
3
10
2
9
1
8
0
Datasheet
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