MD3331-D64-V3-X SanDisk, MD3331-D64-V3-X Datasheet - Page 21

• Manufacturer Part Number: MD3331-D64-V3-X
• Manufacturer: SanDisk
• Type: Flash Diskr

Specifications of MD3331-D64-V3-X

• Density: 64MByte
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Package Type: FBGA
• Mounting: Surface Mount
• Pin Count: 69
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 3.6V
• Programmable: Yes
• Lead Free Status / Rohs Status: Not Compliant

When the maximum number of Mobile DiskOnChip Plus devices are cascaded, the Programmable
Boot Block provides 4KB of boot block area. The Programmable Boot Block of each device is
mapped to a unique address space.
3.6
Upon power up or when the RSTIN# signal is asserted high, the DE automatically downloads the
Initial Program Loader (IPL) from the flash to the Programmable Boot Block. The IPL is
responsible for starting the boot process. The download process is quick (1.3 ms max) and is
designed so that when the CPU accesses Mobile DiskOnChip Plus for code execution, the IPL code
is already located in the Programmable Boot Block.
In addition, the DE downloads the Data Protection Structures (DPS) from the flash to the Protection
State Machines (PSMs), so that Mobile DiskOnChip Plus is secure and protected from the first
moment it is active.
During the download process, Mobile DiskOnChip Plus asserts the BUSY# signal to indicate to the
system that it is not yet ready to be accessed. After BUSY# is negated, the system can access
Mobile DiskOnChip Plus.
A failsafe mechanism prevents improper initialization due to a faulty VCC or invalid assertion of
the RSTIN# input. Another failsafe mechanism is designed to overcome possible NAND flash data
errors. It prevents internal registers from powering up in a state that bypasses the intended data
protection. In addition, in any attempt to sabotage the data structures causes the entire Mobile
DiskOnChip Plus to become both read- and write-protected and completely inaccessible.
3.7
NAND flash, being an imperfect memory, requires error handling. Mobile DiskOnChip Plus
implements Reed-Solomon Error Detection Code (EDC). A hardware-generated, 6-byte error
detection signature is computed each time a page (512 bytes) is written to or read from Mobile
DiskOnChip Plus.
The TrueFFS driver implements complementary Error Correction Code (ECC). Unlike error
detection, which is required on every cycle, error correction is relatively seldom required, hence
implemented in software. The combination of Mobile DiskOnChip Plus’s built-in EDC mechanism
and the TrueFFS driver ensures highly reliable error detection and correction, while providing
maximum performance.
The following detection and correction capability is provided for each 512 bytes:
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Corrects up to two 10-bit symbols, including two random bit errors.
Corrects single bursts up to 11 bits.
Detects single bursts up to 31 bits and double bursts up to 11 bits.
Detects up to 4 random bit errors.
Download Engine (DE)
Error Detection Code/Error Correction Code (EDC/ECC)
Data Sheet, Rev. 1.8
Mobile DiskOnChip Plus 16/32MByte
95-SR-000-10-8L