P80C557E4EFB NXP Semiconductors, P80C557E4EFB Datasheet - Page 45
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P80C557E4EFB
Manufacturer Part Number
P80C557E4EFB
Description
Manufacturer
NXP Semiconductors
Datasheet
1.P80C557E4EFB.pdf
(72 pages)
Specifications of P80C557E4EFB
Cpu Family
80C
Device Core
80C51
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
I2C/UART
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
1KB
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant
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Philips Semiconductors
6.13.4 Seconds Timer
This counter provides an overflow signal every second, when the
32kHz oscillator is running.
The overflow output sets the interrupt flag SECINT. This interrupt
can be disabled/enabled by ENSECI. If SECINT is enabled, it is
logically ORed with INT1 (external interrupt 1).
Seconds interrupt and INT1 therefor share the same priority and
vector. The software has to check both flags SECINT (PLLCON.5)
and IE1 (TCON.3), to distinguish between the two interrupt sources.
SECINT can only be cleared via writing a ‘0’ to this bit .
The external interrupts INT0 , INT1 or the seconds interrupt can
Wake-up the PLL oscillator and the microcontroller as described in
chapter “Wake-up from Power-down Mode”.
For a Wake-up via INT1 or seconds interrupt, IE1 must be enabled
and level-sensitive.
A further function of the seconds timer is to control the start-up
timing of the microcontroller after Reset or after Wake-up from
1999 Mar 02
Single-chip 8-bit microcontroller
XTAL4
RSTIN
C
RUN32 PD
32.768 KHz
1
32 kHz
Oscil-
lator
R
f
C
2
Figure 45. Block diagram PLL
SECONDS TIMER
XTAL3
Phase
comparator
45
Stretched
Reset
P83C557E4/P80C557E4/P89C557E4
Programmable
divider
Power-down. It controls the stretching of the reset pulse to the
microcontroller and controls releasing the system clock to the
microcontroller.
A RSTIN signal of 1us at minimum will reset the microcontroller.
In case of Reset or Wake-up with halted 32kHz oscillator: From
RSTIN falling edge or Wake-up interrupt it takes 560ms at maximum
for the start-up of the 32kHz oscillator itself and the stabilization of
the PLL’s.
In case of Wake-up with running 32kHz oscillator: From Wake-up
interrupt it takes about 1ms for the stabilization of the PLL’s.
After this start-up time, the microcontroller is supplied with the
system clock and – in case of a reset – the internally stretched reset
signal overlaps about 45us, to guarantee a proper initialization of the
microcontroller.
For further information refer to section 6.11 Power reduction modes .
Loop
filter
Internal Bus
PLLCON
CCO
PD
PD = power down
system clock
Reset to controller
’Seconds’
Interrupt
request
Product specification