ELANSC410-33AC AMD (ADVANCED MICRO DEVICES), ELANSC410-33AC Datasheet - Page 70

• Manufacturer Part Number: ELANSC410-33AC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC410-33AC

• Lead Free Status / Rohs Status: Not Compliant

Multiplexed Pin Function Options
Table 20 shows how to configure each multiplexed
s i g n a l o n t h e É l a n S C 4 0 0 a n d É l a n S C 4 1 0
microcontrollers.
Note that those signals marked with a superscript 1 (
are not supported on the ÉlanSC410 microcontroller.
70
Signal You Want
System Interface
BALE
DBUFOE
DBUFRDH
DBUFRDL
MCS16
PDACK1
PDRQ1
PIRQ0
PIRQ1
PIRQ2
PIRQ3
PIRQ4
PIRQ5
PIRQ6
PIRQ7
R32BFOE
SBHE
Configuration Pins (Pinstraps) (See “Using the Configuration Pins to Select Pin Functions” on page 74.)
Memory Interface
CASH2
CASH3
CASL2
CASL3
MA12
RAS2
RAS3
Signals You Give Up
KBD_ROW10
GPIO_CS4
GPIO_CS3
GPIO_CS2
KBD_ROW12
KBD_ROW7
KBD_ROW8
KBD_ROW13
KBD_ROW11
KBD_ROW2
KBD_ROW3
KBD_ROW0
KBD_ROW1
KBD_ROW6
KBD_ROW4
KBD_ROW5
GPIO_CS8
GPIO_CS7
KBD_ROW9
KBD_COL2
KBD_COL3
KBD_COL4
KBD_COL5
KBD_COL6
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Table 20. Multiplexed Pin Configuration Options
How to Configure the Signal You Want on the Pin
Set CSC index 39h[2].
Hardwire strap the CFG3 pin High.
Hardwire strap the CFG3 pin High.
Hardwire strap the CFG3 pin High.
Set CSC index 39h[2].
Set CSC index 39h[2].
Set CSC index 39h[2].
Set CSC index 38h[1].
Set CSC index 38h[2].
Set CSC index 3Ah[1].
Set CSC index 3Ah[1].
Set CSC index 3Ah[2].
Set CSC index 3Ah[2].
Set CSC index 3Ah[2].
Hardwire-strap both the CFG1 and CFG0 pins High to enable the
32-bit ROM interface on ROMSC0. This automatically enables
R32BFOE.
Set CSC index 39h[2].
Set bit 3 of the DRAM Bank x Configuration Register.
Set CSC index 00h[7] and 00h[3], or
Set CSC index 01h[7] and 01h[3], or
Set CSC index 02h[7], or
Set CSC index 03h[7].
Set CSC index 39h[2].
1
)
Pins with multiplexed functions have their functions
selected in one of three ways:
By configuration pins that are latched during reset
By assertion at BNDSCN_EN
By firmware via programmed configuration registers
Pin #
W18
D17
C18
Y19
C17
B18
B19
D16
B17
D15
C16
D2
C4
D3
C2
E3
A2
B3
C3
A1
B2
A3
C1
F3