PIC18F1220-H/ML Microchip Technology, PIC18F1220-H/ML Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1220-H/ML
Manufacturer Part Number
PIC18F1220-H/ML
Description
IC MCU 8BIT 4KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1220-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 1-2:
© 2007 Microchip Technology Inc.
RB0/AN4/INT0
RB1/AN5/TX/CK/INT1
RB2/P1B/INT2
RB3/CCP1/P1A
RB4/AN6/RX/DT/KBI0
RB5/PGM/KBI1
RB6/PGC/T1OSO/
T13CKI/P1C/KBI2
RB7/PGD/T1OSI/
P1D/KBI3
V
V
NC
Legend:
SS
DD
RB0
AN4
INT0
RB1
AN5
TX
CK
INT1
RB2
P1B
INT2
RB3
CCP1
P1A
RB4
AN6
RX
DT
KBI0
RB5
PGM
KBI1
RB6
PGC
T1OSO
T13CKI
P1C
KBI2
RB7
PGD
T1OSI
P1D
KBI3
Pin Name
TTL = TTL compatible input
ST
O
OD = Open-drain (no P diode to V
= Schmitt Trigger input with CMOS levels
= Output
PIC18F1220/1320 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP/
SOIC
17
18
10
12
13
14
11
—
8
9
5
Pin Number
SSOP
15, 16 17, 19
5, 6
10
19
20
12
13
14
11
—
9
QFN
3, 5
10
23
24
12
13
15
16
18
9
Type
DD
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
O
O
O
O
O
P
P
I
I
I
I
I
I
I
I
I
I
I
I
I
)
Analog
Analog
Analog
Buffer
CMOS
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
No connect.
Digital I/O.
Analog input 4.
External interrupt 0.
Digital I/O.
Analog input 5.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
External interrupt 1.
Digital I/O.
Enhanced CCP1/PWM output.
External interrupt 2.
Digital I/O.
Capture 1 input/Compare 1 output/PWM 1 output.
Enhanced CCP1/PWM output.
Digital I/O.
Analog input 6.
EUSART asynchronous receive.
EUSART synchronous data (see related TX/CK).
Interrupt-on-change pin.
Digital I/O.
Low-Voltage ICSP Programming enable pin.
Interrupt-on-change pin.
Digital I/O.
In-Circuit Debugger and ICSP programming clock pin.
Timer1 oscillator output.
Timer1/Timer3 external clock output.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
Digital I/O.
In-Circuit Debugger and ICSP programming data pin.
Timer1 oscillator input.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
CMOS = CMOS compatible input or output
I
P
PIC18F1220/1320
= Input
= Power
Description
DS39605F-page 9
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