PIC18F1220-H/ML Microchip Technology, PIC18F1220-H/ML Datasheet - Page 218
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1220-H/ML
Manufacturer Part Number
PIC18F1220-H/ML
Description
IC MCU 8BIT 4KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1220-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F1220/1320
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39605F-page 216
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
[ label ]
0 ≤ f
0 ≤ f
(f
None
The contents of source register ‘f
are moved to destination register
‘f
anywhere in the 4096-byte data
space (000h to FFFh) and location
of destination ‘f
anywhere from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
The MOVFF instruction should not
be used to modify interrupt settings
while any interrupt is enabled (see
page 73).
2
2 (3)
MOVFF
d
s
Read
(src)
read
1100
1111
’. Location of source ‘f
) → f
Q2
No
=
=
=
=
s
d
≤ 4095
≤ 4095
d
0x33
0x11
0x33,
0x33
REG1, REG2
MOVFF f
ffff
ffff
operation
Process
Data
Q3
d
No
’ can also be
ffff
ffff
s
,f
d
s
register ‘f’
’ can be
operation
(dest)
Write
Q4
No
fff
fff
f
f
s
s
d
’
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0 ≤ k ≤ 255
k → BSR
None
The 8-bit literal ‘k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
‘k’
=
=
© 2007 Microchip Technology Inc.
0x02
0x05
5
MOVLB k
0001
Process
Data
Q3
kkkk
literal ‘k’ to
Write
BSR
Q4
kkkk
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