PIC18F1220-H/ML Microchip Technology, PIC18F1220-H/ML Datasheet - Page 126
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1220-H/ML
Manufacturer Part Number
PIC18F1220-H/ML
Description
IC MCU 8BIT 4KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1220-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F1220/1320
FIGURE 15-9:
15.5.5.1
In the Full-Bridge Output mode, the P1M1 bit in the
CCP1CON register allows the user to control the
Forward/Reverse direction. When the application
firmware changes this direction control bit, the module
will assume the new direction on the next PWM cycle.
Just before the end of the current PWM period, the
modulated outputs (P1B and P1D) are placed in their
inactive state, while the unmodulated outputs (P1A and
P1C) are switched to drive in the opposite direction.
This occurs in a time interval of (4 T
Prescale Value) before the next PWM period begins.
The Timer2 prescaler will be either 1,4 or 16, depend-
ing on the value of the T2CKPS bit (T2CON<1:0>).
During the interval from the switch of the unmodulated
outputs to the beginning of the next period, the
modulated outputs (P1B and P1D) remain inactive.
This relationship is shown in Figure 15-10.
Note that in the Full-Bridge Output mode, the ECCP
module does not provide any dead-band delay. In
general, since only one output is modulated at all times,
dead-band delay is not required. However, there is a
situation where a dead-band delay might be required.
This situation occurs when both of the following
conditions are true:
1.
2.
DS39605F-page 124
The direction of the PWM output changes when
the duty cycle of the output is at or near 100%.
The turn-off time of the power switch, including
the power device and driver circuit, is greater
than the turn-on time.
PIC18F1220/1320
Direction Change in Full-Bridge Mode
P1A
P1B
P1C
P1D
EXAMPLE OF FULL-BRIDGE APPLICATION
OSC
* (Timer2
FET
Driver
FET
Driver
QA
QB
Figure 15-11 shows an example where the PWM direc-
tion changes from forward to reverse, at a near 100%
duty cycle. At time t1, the output P1A and P1D become
inactive, while output P1C becomes active. In this
example, since the turn-off time of the power devices is
longer than the turn-on time, a shoot-through current
may flow through power devices QC and QD (see
Figure 15-9) for the duration of ‘t’. The same phenom-
enon will occur to power devices QA and QB for PWM
direction change from reverse to forward.
If changing PWM direction at high duty cycle is required
for an application, one of the following requirements
must be met:
1.
2.
Other options to prevent shoot-through current may
exist.
Reduce PWM for a PWM period before
changing directions.
Use switch drivers that can drive the switches off
faster than they can drive them on.
Load
V+
V-
QC
QD
© 2007 Microchip Technology Inc.
FET
Driver
FET
Driver
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