PIC18F1220-H/ML Microchip Technology, PIC18F1220-H/ML Datasheet - Page 301
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PIC18F1220-H/ML
Manufacturer Part Number
PIC18F1220-H/ML
Description
IC MCU 8BIT 4KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1220-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Pinout I/O Descriptions
PIR Registers ..................................................................... 78
PLL Lock Time-out ............................................................. 34
Pointer, FSR ....................................................................... 53
POP .................................................................................. 220
POR. See Power-on Reset.
PORTA
PORTB
Postscaler
Power Managed Modes ..................................................... 19
Power-on Reset (POR) .............................................. 34, 171
Power-up Delays ................................................................ 18
Power-up Timer (PWRT) .......................................18, 34, 171
Prescaler
Product Identification System ........................................... 304
Program Counter
Program Memory
Program Verification and Code Protection ....................... 185
Programming, Device Instructions ................................... 191
PUSH ............................................................................... 220
PUSH and POP Instructions .............................................. 43
PWM (CCP Module)
© 2007 Microchip Technology Inc.
PIC18F1220/1320 ........................................................ 8
Associated Registers ................................................. 89
Functions ................................................................... 89
LATA Register ............................................................ 87
PORTA Register ........................................................ 87
TRISA Register .......................................................... 87
Associated Registers ................................................. 98
Functions ................................................................... 98
LATB Register ............................................................ 90
PORTB Register ........................................................ 90
RB7:RB4 Interrupt-on-Change Flag
TRISB Register .......................................................... 90
Timer2 ...................................................................... 109
WDT
Comparison between Run and Idle Modes ................ 20
Entering ...................................................................... 20
Idle Modes ................................................................. 21
Multiple Sleep Commands ......................................... 20
Run Modes ................................................................. 26
Selecting .................................................................... 19
Sleep Mode ................................................................ 21
Summary (table) ........................................................ 19
Wake from .................................................................. 28
Capture .................................................................... 117
Timer0 ...................................................................... 101
Timer2 ...................................................................... 119
PCL Register .............................................................. 44
PCLATH Register ...................................................... 44
PCLATU Register ...................................................... 44
Instructions in ............................................................. 46
Interrupt Vector .......................................................... 41
Map and Stack for PIC18F1220 ................................. 41
Map and Stack for PIC18F1320 ................................. 41
Reset Vector .............................................................. 41
Associated Registers ............................................... 185
Configuration Register ............................................. 188
Data EEPROM ......................................................... 188
Program Memory ..................................................... 186
CCPR1H:CCPR1L Registers ................................... 119
(RBIF Bit) ........................................................... 90
Assignment (PSA Bit) ...................................... 101
Rate Select (T0PS2:T0PS0 Bits) ..................... 101
Assignment (PSA Bit) ...................................... 101
Rate Select (T0PS2:T0PS0 Bits) ..................... 101
PWM (ECCP Module) ...................................................... 119
Q
Q Clock ............................................................................ 119
R
RAM. See Data Memory.
RCALL ............................................................................. 221
RCIO Oscillator .................................................................. 13
RCON Register
RCSTA Register
Reader Response ............................................................ 303
Register File ....................................................................... 47
Register File Summary .................................................50–51
Registers
Duty Cycle ............................................................... 119
Example Frequencies/Resolutions .......................... 119
Period ...................................................................... 119
TMR2 to PR2 Match .........................................109, 119
Associated Registers ............................................... 130
Direction Change in Full-Bridge Output Mode ......... 124
Effects of a Reset .................................................... 129
Enhanced PWM Auto-Shutdown ............................. 126
Full-Bridge Application Example .............................. 124
Full-Bridge PWM Output (Active-High) Diagram ..... 123
Half-Bridge Output (Active-High) Diagram ............... 122
Half-Bridge Output Mode Applications Example ...... 122
Operation in Low-Power Modes .............................. 129
Output Configurations .............................................. 119
Output Relationships (Active-High) .......................... 120
Output Relationships (Active-Low) .......................... 121
Programmable Dead-Band Delay ............................ 126
PWM Direction Change (Active-High) Diagram ....... 125
PWM Direction Change at Near
Setup for PWM Operation ........................................ 129
Start-up Considerations ........................................... 128
Bit Status During Initialization .................................... 35
SPEN Bit .................................................................. 131
ADCON0 (A/D Control 0) ......................................... 155
ADCON1 (A/D Control 1) ......................................... 156
ADCON2 (A/D Control 2) ......................................... 157
BAUDCTL (Baud Rate Control) ............................... 134
CCP1CON (Enhanced CCP1 Control) .................... 115
CONFIG1H (Configuration 1 High) .......................... 172
CONFIG2H (Configuration 2 High) .......................... 174
CONFIG2L (Configuration 2 Low) ........................... 173
CONFIG3H (Configuration 3 High) .......................... 175
CONFIG4L (Configuration 4 Low) ........................... 175
CONFIG5H (Configuration 5 High) .......................... 176
CONFIG5L (Configuration 5 Low) ........................... 176
CONFIG6H (Configuration 6 High) .......................... 177
CONFIG6L (Configuration 6 Low) ........................... 177
CONFIG7H (Configuration 7 High) .......................... 178
CONFIG7L (Configuration 7 Low) ........................... 178
DEVID1 (Device ID 1) .............................................. 179
DEVID2 (Device ID 2) .............................................. 179
ECCPAS (ECCP Auto-Shutdown Control) .............. 127
EECON1 (Data EEPROM Control 1) ....................59, 68
INTCON (Interrupt Control) ........................................ 75
INTCON2 (Interrupt Control 2) ................................... 76
INTCON3 (Interrupt Control 3) ................................... 77
IPR1 (Peripheral Interrupt Priority 1) ......................... 82
IPR2 (Peripheral Interrupt Priority 2) ......................... 83
LVDCON (LVD Control) ........................................... 167
OSCCON (Oscillator Control) .................................... 17
100% Duty Cycle (Active-High) Diagram ......... 125
PIC18F1220/1320
DS39605F-page 299
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